![]() | |
IP / SOC Products Articles
-
When Traceability Catches What Verification Does Not (Jun. 30, 2022)
Through a complex design process, some mistakes will inevitably slip by even the most expert system-on-chip (SoC) design teams. A disciplined V-model process (diagrammed below) will guard against many of these errors in the concept-to-design process (left arm) and in the verification-to-validation process (right arm).
-
Implementing C model integration using DPI in SystemVerilog (Jun. 27, 2022)
This article gives the procedure or step-by-step guide to integrating the C model in the UVM Testbench/environment using the SystemVerilog DPI (Direct Programming Interface) feature.
-
Lossless Compression Efficiency of JPEG-LS, PNG, QOI and JPEG2000: A Comparative Study (Jun. 20, 2022)
In this paper we attempt to compare the achievable compression ratio of four lossless image formats across a data set of 2814 images exhibiting high variance in their key characteristics. The results are then categorized based on the image type to further illustrate the potential effectiveness of each image format for specific use cases.
-
Understanding Interface Analog-to-Digital Converters (ADCs) with DataStorm DAQ FPGA (May. 30, 2022)
We propose the implementation of analog signals into digital signals and data communication between the ADC and FPGA (Field Programmable Gate Array). For working on the ADC, we have used the “DataStorm DAQ” FPGA board. Designers can use any type of FPGA.
-
New Ethernet Adaptation Layer Adds Control Option to MIPI A-PHY Automotive Networks (May. 19, 2022)
To satisfy the demand for both advanced safety features and better driver and passenger experiences, automakers are adding more displays, larger in size and with greater resolutions, to the digital cockpit. This trend has created a need for more in-vehicle wiring, which in turn adds cost, weight and complexity to new car designs.
-
Automotive electronics revolution requires faster, smarter interfaces (May. 19, 2022)
In the automotive industry, features such as advanced driver-assistance systems (ADAS), connected in-vehicle infotainment (IVI) and emerging autonomous driving systems (ADS) are more important than ever, making vehicles safer and improving the driving experience
-
An 800 Mpixels/s, ~260 LUTs Implementation of the QOI Lossless Image Compression Algorithm and its Improvement through Hilbert Scanning (May. 19, 2022)
This paper discusses the hardware implementation of an encoder and a decoder for the QOI lossless RGB image format. Some results are given for the AMD/Xilinx architecture, reaching over 800 Mpixels/s in Ultrascale+ and more than 4K@30 in Artix-7. A compression improvement up to ~15% is also observed when natural images are scanned along a Hilbert curve instead of the normal raster order.
-
AES 256 algorithm towards Data Security in Edge Computing Environment (May. 16, 2022)
Today, enormous volumes of data are generated by a growing number of sensors and smart IoT devices, and ever-increasing processing power is moving the core of calculations and services from the cloud to the network's edge. Advances in Artificial Intelligence (AI) have opened up a plethora of new options for resolving security problems in the context of Edge Computing, where security and privacy have become key considerations.
-
Add Security And Supply Chain Trust To Your ASIC Or SoC With eFPGAs (May. 06, 2022)
Even though there are many security and encryption techniques designers can use to make a chip secure, what else can be done to increase the confidence that the chip is trustworthy? eFPGA opens a new range of capabilities
-
Capitalizing on the Architectural Flexibility of FPGAs with RISC-V and a Simplified Programming Flow (Apr. 27, 2022)
Microprocessors have traditionally dominated the realm of computing, and in this drive toward more compute capabilities, silicon-based ICs were consistently improved upon in device density
-
CAN FD: Anything But Automotive Only (Apr. 25, 2022)
Due to higher bandwidth requirements in the automotive field, the CAN (controller area networking) specification was extended for flexible data–rates with a new iteration known as CAN FD.
-
Why Hardware Root of Trust Needs Anti-Tampering Design (Apr. 11, 2022)
The hardware root of trust (HRoT) provides the trust base (root key), hardware identifier (UID), hardware unique key (HUK), and entropy required for the secure operation of the entire chip and therefore is often the focus of hacker attacks. If the design can’t effectively resist attacks, hackers can easily obtain the secrets of the entire chip. Attackers can use the secrets to crack identity authentication and data encryption and steal product design know-how, causing application security problems.
-
Software-Defined Everything doesn't mean Software-Only Security (Apr. 04, 2022)
Computing power has reached the point where once “hardware-only” functions can now be handled by the software layer running on top of the hardware, with negligible performance difference for users.
-
TPM 2.0-Ready: Top Security with PUFcc (Mar. 24, 2022)
The rising security threats endangering our connected world, from the chip to the cloud, are among the biggest challenges facing us today. Microsoft recently addressed some of these concerns by mandating the inclusion of TPM 2.0 (Trusted Platform Module) in all devices running its latest Windows 11 operating system. I
-
Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution (Mar. 21, 2022)
Formal verification techniques have been developed using mathematical proof rather than simulation or test vectors to provide a higher level of verification confidence on properties. For example, the implementation can be either a Verilog RTL module or an abstract version of a particular design, while the specification is typically a set of properties that needs to be verified and expressed suitably. So, formal verification provides a complete verification of each specification property under considering corner cases even without test vectors.
-
UPF Constraint coding for SoC - A Case Study (Mar. 07, 2022)
This paper deals with the implementation of UPF for low power SoC design that can encompass several vendor IPs and custom IPs UPF constraints.
-
Easing PCIe 6.0 Integration from Design to Implementation (Mar. 01, 2022)
Because of the data explosion and increasing bandwidth for high-performance computing (HPC), we are seeing PCI Express (PCIe) data rates moving from 32G (PCIe 5.0) to 64G (PCIe 6.0). In addition, since NRZ no longer supports the higher data rates, PCIe 6.0 is moving to PAM-4 signaling.
-
eFPGA LUTs Will Outship FPGA LUTs Later This Decade (Mar. 01, 2022)
FPGAs have become a strategic technology. It used to be a “poor man’s ASIC” and provided a customized IC for lower-volume applications. While it is still used this way in many systems, it has also become strategically important to two very big, high-growth applications.
-
Calibrate and Configure your Power Management IC with NVM IP (Feb. 21, 2022)
Power Management Integrated Circuits (PMICs) are the first to turn on and the last to turn off in a system. They perform the task of delivering the right voltage to component chips by regulating or boosting the voltage levels to the component chips.
-
Automotive Architectures: Domain, Zonal and the Rise of Central (Feb. 17, 2022)
Today, automotive electronics are ubiquitous, controlling or assisting with every aspect of the vehicle’s operation and performance. Electronics now account for over 40 percent of a new vehicle’s total cost, having grown from just 18 percent in 2000, according to Deloitte.
-
Top 5 predictions for eFPGA in 2022 (Feb. 03, 2022)
With the eFPGA now readily available in many process nodes from multiple suppliers, Flex Logix offers predictions on what we can expect to see around eFPGA development and use cases in 2022 and beyond.
-
Traceability for Embedded Systems (Feb. 03, 2022)
Traceability can seem an obscure and/or bureaucratic concept to most. It entails cross-checking requirements between a spreadsheet, specifications, and the implementation and verification, rinse and repeat. From a view in the trenches where real problems must be solved, it can be hard to understand how this exercise adds value.
-
The Future of Embedded FPGAs - eFPGA: The Proof is in the Tape Out (Jan. 27, 2022)
Embedded FPGA (eFPGA) is the next big market for semiconductor IP. It can be used on almost every kind of digital chip and has a significant software value add as well—much like the market for embedded processors.
-
Ruggedizing Buck Converters For Space And Other High Radiation Environments (Jan. 20, 2022)
In this article, we review the effect of radiation on passive and active electronic components and the technologies, processes and device techniques that make them radiation-tolerant or radiation-hard.
-
Designing Cloud based Multimedia Solutions (Jan. 19, 2022)
Custom IP integration along with other cloud services showcases better feasibility of using Open-Source codec, to use one’s transcoder instead of cloud media-converter for multimedia solutions. In this article, we will see how an Open-Source codec like AV1 is selected as a custom IP for encoding to integrate over the cloud as a service.
-
Reinventing Traceability: Adding domain intelligence with Arteris Harmony Trace (Jan. 13, 2022)
Harmony Trace is an enterprise level server-based application with a web-based UI that interfaces to your existing requirements, EDA tool, documentation, and support systems, creating a system-of-systems that allows complete visibility of requirements traceability through the entire SoC design flow and product life cycle.
-
Solving Chip Security's Weakest Link (Jan. 13, 2022)
With the invention of Physical Unclonable Functions (PUF), we can now create a unique, inborn, unclonable key at the hardware level. The natural follow-up question to this is, “but how do we protect this key?” It is like storing your key to secrets in a drawer, a surefire way to break the secure boundary and create vulnerabilities.
-
Convey 4K & 8K over Gigabit Network, Cat5E cables and Wifi-6 (Jan. 06, 2022)
Created and engineered by intoPIX, TicoXS FIP combines JPEG XS with an advanced Flawless Imaging Profile (FIP) to deliver more compression efficiency on any content guaranteeing the best AV over IP experience using ONE Gigabit Network infrastructure.
-
System on Modules (SOM) and its end-to-end verification using Test Automation framework (Dec. 22, 2021)
The goal of this article is to walk through what is SOM (system on module), which all are available most commonly SOM today in the market, and the benefits of uses.
-
NVM on Advanced Nodes for Smartphone & HPC Platforms (Nov. 22, 2021)
In the applications of high-performance computing and high-end smartphones, chip designers are chasing high-profit margins, and customers are looking for products with the best performance and security. These demands create a powerful driving force, pushing foundries to keep up with Moore’s Law and IP vendors to keep providing high-performance IPs