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IP / SOC Products Articles
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IP-Reuse and Platform Base Designs (Aug. 22, 2003)
IP-Reuse and Platform Base Designs
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The PCI Express Architecture and Advanced Switching (Aug. 22, 2003)
The PCI Express Architecture and Advanced Switching
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Platform-based design: Blocks and buses lead the way (Aug. 21, 2003)
Platform-based design: Blocks and buses lead the way
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Non-Transparent Bridging Makes PCI-Express HA Friendly (Aug. 14, 2003)
Non-Transparent Bridging Makes PCI-Express HA Friendly
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Mentor Graphics Executive Viewpoint : Increasing System Complexity Drives Need for IP (Aug. 08, 2003)
Mentor Graphics Executive Viewpoint : Increasing System Complexity Drives Need for IP
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A 4GHz fractional-N synthesizer for multi-mode wireless applications (Aug. 08, 2003)
A 4GHz fractional-N synthesizer for multi-mode wireless applications
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Rotten to the Core or Core-blimey…Silicon DNA! - Part 1: Getting Ready to Outsource an IP Core (Aug. 07, 2003)
Rotten to the Core or Core-blimey…Silicon DNA! - Part 1: Getting Ready to Outsource an IP Core
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Rotten to the Core — Part 2: Soft and Vanilla or Hard and Cryptic? (Aug. 07, 2003)
Rotten to the Core — Part 2: Soft and Vanilla or Hard and Cryptic?
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Standards-Based IP Cores Ease Networking IC Design (Aug. 07, 2003)
Standards-Based IP Cores Ease Networking IC Design
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Memory Amnesia Could Hurt Low-Power Design (Jul. 30, 2003)
Memory Amnesia Could Hurt Low-Power Design
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Techniques for energy-efficient SoC design (Jul. 24, 2003)
Techniques for energy-efficient SoC design
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CASE STUDY - Hands-on lessons from a legacy RT-level ATAPI IP Reuse (Jul. 18, 2003)
CASE STUDY - Hands-on lessons from a legacy RT-level ATAPI IP Reuse
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Hierarchical design methodology supports complex FPGAs (Jul. 17, 2003)
Hierarchical design methodology supports complex FPGAs
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A Reconfigurable System featuring Dynamically Extensible Embedded Microprocessor, FPGA and Customisable I/O (Jul. 11, 2003)
A Reconfigurable System featuring Dynamically Extensible Embedded Microprocessor, FPGA and Customisable I/O
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Mapping LMS Adaptive Filter IP Core to Multiplier-Array FPGA Architecture for High Channel-Density VOIP Line Echo Cancellation (Jul. 08, 2003)
Mapping LMS Adaptive Filter IP Core to Multiplier-Array FPGA Architecture for High Channel-Density VOIP Line Echo Cancellation
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Multimedia needs multiprocessor SoCs (Jul. 07, 2003)
Multimedia needs multiprocessor SoCs
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Custom SoC designers must consider interconnect effects (Jun. 23, 2003)
Custom SoC designers must consider interconnect effects
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Finding the Right Processing Architecture for AES Encryption (Jun. 18, 2003)
Finding the Right Processing Architecture for AES Encryption
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Timing key to optimizing audio performance in consumer products (Jun. 17, 2003)
Timing key to optimizing audio performance in consumer products
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In designing DDR interface, look before leaping (Jun. 16, 2003)
In designing DDR interface, look before leaping
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Next-gen DSL: SoC doubles the data rates (Jun. 16, 2003)
Next-gen DSL: SoC doubles the data rates
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IP cores crowd SoCs (Jun. 16, 2003)
IP cores crowd SoCs
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Maximize CPU power for physical verification (Jun. 13, 2003)
Maximize CPU power for physical verification
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Adaptive Frequency Hopping for Reduced Interference between Bluetooth® and Wireless LAN (Jun. 13, 2003)
Adaptive Frequency Hopping for Reduced Interference between Bluetooth® and Wireless LAN
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Ten lies about microprocessors (Jun. 11, 2003)
Ten lies about microprocessors
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Test may decide choice of SoC or system-in-package (Jun. 09, 2003)
Test may decide choice of SoC or system-in-package
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Asynchronous design gets a second look (Jun. 06, 2003)
Asynchronous design gets a second look
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Clockless IC designs are ready to compete (Jun. 06, 2003)
Clockless IC designs are ready to compete
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Does asynchronous logic design really have a future? (Jun. 06, 2003)
Does asynchronous logic design really have a future?
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Clock domain modeling is essential in high density SoC design (Jun. 06, 2003)
Clock domain modeling is essential in high density SoC design