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IP / SOC Products Articles

• A powerful dual-mode IP core for 802.11a/b Wireless LANs (Dec. 20, 2002)
  A powerful dual-mode IP core for 802.11a/b Wireless LANs
  
  
• High-speed fabrics deliver optimal IP implementation (Dec. 19, 2002)
  High-speed fabrics deliver optimal IP implementation
  
  
• Your IP: easy to protect, easy to reuse (Dec. 19, 2002)
  Your IP: easy to protect, easy to reuse
  
  
• 7 warning signs that you should be concerned about your IP provider (Dec. 19, 2002)
  7 warning signs that you should be concerned about your IP provider
  
  
• Layout compaction accelerates SoC design through hard IP reuse (Dec. 19, 2002)
  Layout compaction accelerates SoC design through hard IP reuse
  
  
• Re-use versus re-synthesize: Preparing for deep submicron issues ahead (Dec. 19, 2002)
  Re-use versus re-synthesize: Preparing for deep submicron issues ahead
  
  
• The five facets of SoC design complexity (Dec. 19, 2002)
  The five facets of SoC design complexity
  
  
• Closing the abstraction gap in 100M-gate designs (Dec. 19, 2002)
  Closing the abstraction gap in 100M-gate designs
  
  
• Mixed-signal design flow enables RF CMOS chip (Dec. 12, 2002)
  Mixed-signal design flow enables RF CMOS chip
  
  
• System-level issues dominate code writing (Dec. 10, 2002)
  System-level issues dominate code writing
  
  
• DSP app? 80-20 rule still works (Dec. 09, 2002)
  DSP app? 80-20 rule still works
  
  
• Optimizing performance of DSPs (Dec. 09, 2002)
  Optimizing performance of DSPs
  
  
• Selecting DSP development tools (Dec. 09, 2002)
  Selecting DSP development tools
  
  
• Wireless SDR: overcoming next gen handset challenges (Dec. 09, 2002)
  Wireless SDR: overcoming next gen handset challenges
  
  
• Speeding DSP solutions with FPGAs (Dec. 09, 2002)
  Speeding DSP solutions with FPGAs
  
  
• Gate-array-like processes gain ground (Dec. 06, 2002)
  Gate-array-like processes gain ground
  
  
• How to organize a complex SoC project (Dec. 06, 2002)
  How to organize a complex SoC project
  
  
• Reduce SOC simulation and development time by designing with processors, not gates (Dec. 06, 2002)
  Reduce SOC simulation and development time by designing with processors, not gates
  
  
• Keynoter sees asynchronous future for digital designs (Dec. 04, 2002)
  Keynoter sees asynchronous future for digital designs
  
  
• Fitting DSP to app no easy task (Dec. 02, 2002)
  Fitting DSP to app no easy task
  
  
• Wireless home multimedia networks require multiple design strategies (Dec. 02, 2002)
  Wireless home multimedia networks require multiple design strategies
  
  
• Reconfigurable arrays of processors needed for wireless multimedia (Dec. 02, 2002)
  Reconfigurable arrays of processors needed for wireless multimedia
  
  
• Synthesizable Analog IP (Nov. 29, 2002)
  Synthesizable Analog IP
  
  
• Easic's Zvi Or-Bach throws cold water on a semiconductor industry recovery (Nov. 27, 2002)
  Easic's Zvi Or-Bach throws cold water on a semiconductor industry recovery
  
  
• BIST versus ATPG -- separating myths from reality (Nov. 27, 2002)
  BIST versus ATPG -- separating myths from reality
  
  
• The myth behind the semiconductor industry's growth-cycle guarantee (Nov. 27, 2002)
  The myth behind the semiconductor industry's growth-cycle guarantee
  
  
• Commentary: Formal platform-based design tames risks, complexity costs (Nov. 25, 2002)
  Commentary: Formal platform-based design tames risks, complexity costs
  
  
• Tooling critical to project success (Nov. 25, 2002)
  Tooling critical to project success
  
  
• COT or ASIC? No brainer for big, fast router market (Nov. 25, 2002)
  COT or ASIC? No brainer for big, fast router market
  
  
• Opinion: Grappling with licensing and time to market issues (Nov. 19, 2002)
  Opinion: Grappling with licensing and time to market issues