This transmitter provides CMOS signal to LVDS, and the receiver provides LVDS signal to CMOS. The data rate between them can be up to 650Mhz. The LVDS transceiver is implemented in GSMC 0.11um ...

Multiple power supply IO library for HHGrace 0.11um Eflash Low Power Dual Gate ( 1.5V/5V ) process

HGrace 0.11um Eflash Low Power Dual Gate ( 1.5V/5V ) process; Supports a broad range of IO power supply from 1.8V to 3.3V ; Supports configurable output driving capability under different IO ...

For ASIC and SoCs designers who need fast, right-the-first time design and fast time to volume, Menta is unique in our ability to deliver proven eFPGAs in your selected technology for your specific ...

M31 memory compilers are designed with high industrial standards to which provides the memory solutions for density, power, and performance optimizations. M31 memory compilers are using leveraging ...

Specialty I/O solutions - Higher voltage tolerance - higher ESD robustness - Configurable

Supports capacitor-less application with fast transient; Typical output 1.50V, output range is from 1.40V to 1.65V; 200mA driving ability

Supports 1Ksps~4Msps sampling rate; 4-channel differential inputs or 8-channel single-ended inputs; High performance: ENOB≥11.0bit @1Msps; Ultra-low power:

Supports 1Ksps~2Msps sampling rate; 8-channel differential inputs or 20-channel single-ended inputs; High performance: ENOB≥11.0bit @1Msps; Ultra-low power:

Resolution: 10-bit resolution; THD+N = -45dB;; Noise at on signal = -60dB; DNL = ±1LSB;; INL = ±1LSB;

Generate real time phase aligned clock with short breaks of reference clock;; Power supply range is from 1.30V to 1.65V; 1.5V ULL MOS only;; Lower than 50uA static current;; Supports reference ...

Crystal-less USB1.1 PHY, low cost;; Low EMI; 6kV HBM ESD capability;; Internal low jitter PLL

Ultra-low size DUP-PAD total solution; Standard I/O size is low to 72um*40um; HBM ESD: ±2000V; MM: ±200V; CDM: ±500V; LU: 150mA

Supports 1Ksps~4Msps sampling rate;; 18-channel single-ended inputs;; High performance: ENOB≥11.2bit @1Msps;; Ultra-low power: <1uA @1Ksps; <200uA @1Msps

Output range: 1MHz~300MHz;; Operating current: <120uA@100MHz;; RMS jitter: <15ps;; Supports 1.20V power supply

Crystal-less USB1.1 PHY, low cost;; Provide 3.3V PD_HV control signal;

Temperature Range:-40℃~125℃;; Voltage at 25℃:1.43V;; Sensor Gain: 4.3mV/℃;; Class AB output

Frequency accuracy: (4KHz/4.096KHz); -0.9% ≤ η ≤ +0.9%, temperature range: -20℃~85℃; -1.2% ≤ η ≤ +1.2%, temperature range: -40℃~125℃; High PSRR capability for output clock

High accuracy and low coefficient of temperature (After trimming): ; Frequency deviation: -1% ~ +1%, temperature range: -40℃~125℃ ; Frequency deviation: -0.7% ~ +0.7%, temperature range: ...

The CCRV32ST-C processor is a synthesisable Verilog model of a high performance 32-bit RV32GC processor. The model is highly configurable, and particularly suitable for system-on-a-chip (SoC) ...

CCRV32ST-C SDK/IDE/ISS (Windows)

The CCRV32ST-S is a synthesisable Verilog model of a high performance 32-bit RV32GC System-on-Chip. The model is highly configurable and embeds a wide range of peripherals. The SoC can be efficiently ...

CCRV32ST-S SDK/IDE/ISS (Windows)

12-Bit 1MSPS SAR ADC, 10.5 Bit ENOB

12-Bit 1MSPS SAR ADC, 10.5 Bit ENOB

12-Bit 1MSPS SAR ADC, 10.5 Bit ENOB

12-Bit 3.5MSPS SAR ADC, 11-Bit ENOB

Analog Comparator with Voltage DAC

Analog Comparator with Voltage DAC

Analog Comparator with Voltage DAC

12-Bit Low Speed DAC with Output Buffer

12-Bit Low Speed DAC with Output Buffer

12-Bit Low Speed DAC with Output Buffer

24-Bit Accuracy Fractional PLL; Support 8K~192K*256 Clock Output

Integer PLL, VCO from 50M to 150MHz

Integer PLL, 32KHz Input, VCO from 32M to 64MHz

LDO, 3.3V to 1.5V Output, 100mA Capability

LDO, 3.3V to 1.5V Output, 100mA Capability

LDO, 3.3V to 1.5V Output, 100mA Capability

LDO, 3.3V to 1.5V Output, 100mA Capability

The USB 2.0 PHY is a complete mixed-signal IP solution designed to implement OTG connectivity in a System-on-Chip (SoC) design targeted to a specific fabrication process using core and 2.5-V ...