Microtronix premieres this summers' Full HDTV ''Streaming'' Blockbuster Hit

LONDON, Ontario— May 14, 2007 — Microtronix® today premiered Microtronix Streaming Multi-port SDRAM Memory Controller IP Core, an easy to use and affordable way to transform SD to HD content from our stand-alone GUI on your Avalon or non-Avalon device. Using Microtronix Streaming Multi-port SDRAM Memory Controller IP Core's stunning new interface, anyone can quickly capture high speed DDR data and process up to six independently clocked streaming data sources from one shared high bandwidth memory system using the simple and intuitive Microtronix stand-alone GUI. Microtronix Streaming Multi-port SDRAM Memory Controller IP Core supports Cyclone I, II, III*, Stratix I, II and GX devices. A risk free evaluation for 30 days is available for online at: Microtronix Downloads

“The Microtronix Streaming Multi-port SDRAM Memory Controller IP Core integrates a burst SDRAM memory controller core, a port arbitrator and intelligent look-ahead FIFO controller into one easy-to-use core,” said Philippe Morin, VP Sales & Marketing. “By supporting SDR & DDR / DDR2 and Mobile DDR device families in a single IP Core assures designers of a smooth low-risk migration path with changing technology. It outperforms standard controllers by almost 20 percent.”

Leading manufacturers of high-end visual products who have purchased the Microtronix "Streaming" Multi-port SDRAM Memory Controller IP Core have also purchased the Microtronix ViClaro II HD Video Enhancement Development Platform. When combined with IP, the board can be used to convert or enhance video quality. Applications include; motion judder removal, 720p-1080p up-conversion, auto-scaling, frame rate conversion, motion-adaptive filtering, and colour enhancements.

Advanced Performance Architecture

• 200 / 267 MHz Cyclone / Stratix memory performance
• Source synchronous clocking simplifies timing closure
• Configurable FIFO optimizes streaming video applications
• Configurable memory and local bus data width
• Independent time domain clocking optimizes memory bandwidth
• Round-robin bus arbitration

Features

• SDR, DDR, DDR2 and Mobile DDR Memory Devices
• Up to 6 local bus RD or WR ports
• Configurable FIFO depth: 16 to 2048 bytes
• Memory data width: 8/16/32/64-bit
• Local bus width from 8 to 128-bits
• Intelligent SDRAM burst caching minimizes wait-states
• Layout independent DDR Round-Trip capture scheme
• Multiple time domain clocking
• Configuration GUI streamlines design process
• Supports Cyclone I, II, III*, Stratix I, II and GX

* Pending Hardware Verification

Pricing & Availability

The Microtronix “Streaming” Multi-port SDRAM Memory Controller IP Core is available for immediate sale.

About Microtronix

Since 1977, Microtronix has pioneered the X.25 protocol for the telecommunication market. Today, Microtronix continues to lead the industry in innovation with its AMA CDR Collection, network conversion, mediation, X.25-TCP/IP Gateways, and SMDI/SIP MWI Solutions. Microtronix is also spearheading the embedded engineering design revolution with its complete range of services from engineering design to manufacturing. Microtronix also specializes in the rapid development of Intellectual Property and embedded applications for FPGA devices. Much has changed since 1977 but our mission to provide the same high quality embedded engineering solutions to answer today's changing market demands, using faster embedded platforms, operating systems and high-speed connectivity that support our customers' business and strategic objectives remains unchanged.

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