Palmchip introduces IDE host controller IP core
![]() |
Palmchip introduces IDE host controller IP core
By Michael Santarini, EE Times
May 1, 2000 (10:34 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000501S0014
Palmchip Corp. (San Jose, Calif.) has announced the availability of the BK-3709 IDE host controller intellectual property (IP) core.
The core, designed for easy integration into system-on-chip designs, provides a complete IDE host controller subsystem, the company said.
Using the BK-3709 core, the company said, system OEMs and fabless semiconductor companies can develop IDE host controller solutions faster and with lower development costs.
Palmchip claims the BK-3709 IDE host controller includes all of the digital circuitry needed to provide a complete interface between a host processor system and an IDE- or Atapi-compatible hard-drive subsystem or device.
The BK-3709 includes programmed I/O (PIO), multiword direct memory access (DMA) and Ultra ATA interface circuitry. It supports up to four separate hard-disk-drive device files.
The BK-3709 core also supports primary and secondary data channels with independent o r combined interrupts.
The design supports PIO modes 1 through 4; multiword DMA modes 0, 1 and 2; and synchronous Ultra ATA-33 and -66 modes 0 through 4.
An enhanced version, the BK-3710, featuring higher performance and Intel register-set compatibility, will be available in late June.
Palmchip said the BK-3709 IDE host controller core is shipped as RTL Verilog source code, but documentation, synthesis scripts and a testbench are also available.
The testbench includes the RTL source code, a simulation harness, models for the ATA slave devices, DMA and control interfaces, and test stimulus.
Palmchip and Altera Corp. also said last month that they would make the IDE host controller available this year through the Altera Megafunction Partners Program. Pricing for the Altera netlist version will be announced when the core is available through the program.
Visit www.palmchip.com.
Related News
- Palmchip Introduces new ATA/133 Host and Device Subsystem Controller Cores
- Palmchip Announces Advanced IDE Host Controller IP Core to Reduce Hard Disk Interface Development Time and Cost
- Arasan Chip Systems Introduces MMC/e.MMC 4.5 Host Controller IP
- Renesas Electronics Introduces New USB 3.0 Host Controller with 85 Percent Reduced Power Consumption
- Evatronix Introduces the World's Fastest SD/SDIO/MMC Host Controller
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |