HEVC/AVC Single-core Video Codec HW IP of Low-cost Version: 4K60fps
Sonics Extends GALS Support for Advanced Power Management
SonicsExpress enables developers to extend the globally asynchronous locally synchronous (GALS) capabilities of Sonics SMART Interconnect solutions, while maintaining automated system level verification and ultra-low power consumption.
SonicsExpress supports both single non-blocking and multi-threaded configurations. When coupled with the GALS capabilities of existing SMART Interconnect solutions, SonicsExpress enables SoC developers to apply a wide variety of GALS techniques including fully synchronous, variable-rate divided synchronous, or fully asynchronous clock domain crossing with optional voltage domain crossing support.
"Today power optimization drives most SoC development," said Sonics CTO, Drew Wingard. "By implementing multiple voltage islands, regions of the SoC can now be independently tuned in clock frequency and voltage to reduce both leakage current and dynamic power. These regions are naturally asynchronous to one another, which is why SoC developers are introducing GALS on a broader scale."
Although most SoCs contain some asynchronous boundaries, widespread application of GALS has been delayed due to latency, area and design closure challenges. Furthermore, managing voltage domains at the asynchronous boundaries has been largely ignored. Adopting clockless or other asynchronous signaling techniques in SoC architectures on a wide-scale basis also breaks stable EDA flows because many EDA tools are not capable of verifying proper operation for the asynchronous components. As a result, developers find it difficult to reach timing closure and complete a project.
By employing the well-proven SonicsMX or SonicsLX SMART Interconnect solution as the foundation SoC architecture and connecting SonicsExpress to that foundation, SoC developers can maintain architecture consistency and improve their competitive advantages while utilizing standard EDA flows to complete their projects. The packet-based data flow transaction optimizations made in the new versions of SonicsMX and SonicsLX ensures SoC developers can rapidly achieve high performance when employing SonicsExpress, and also achieve power and area optimization.
In addition, SonicsExpress operates in the production-proven SonicsStudio(TM) development environment, which provides both high productivity in the architecture and design phases of the SoC. With SonicsStudio, SoC developers can maintain an automated system-level verification of the interconnected components as well as rapid design iterations, higher design flexibility, and enhanced SoC quality.
About Sonics
Sonics Inc. is a premier supplier of SMART Interconnect solutions that deliver high SoC design predictability and increased design efficiency. Major semiconductor and systems companies including Broadcom, Samsung, Texas Instruments and Toshiba have applied Sonics' SMART Interconnect solutions in leading products in the wireless, digital multimedia and communications markets. Sonics is a privately-held company funded by Cadence Design Systems, Toshiba Corporation, Samsung Ventures and venture capital firms Investar Capital, Smart Technology Ventures, TL Ventures, Easton Hunt Capital, JAFCO Ventures and H&Q Asia-Pacific. For more information, see www.sonicsinc.com.
|
||||||
Related News
- Project GALAXY will push GALS design flow for chip integration
- SigmaSense Teams Up with Dolphin Design to Deliver Power Efficiency in their Advanced SDC300 Touch Controller
- M31 cooperates with Tower Semiconductor to develop advanced SRAM and ROM solutions for its 65nm Power Management Platform
- Dolphin Design teams up with Raspberry Pi for advanced chip power management
- Lattice Extends Low Power FPGA Portfolio with Launch of MachXO5T-NX Advanced System Control FPGAs
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
|
|
E-mail This Article |
|
Printer-Friendly Page |












