English
Spiral Gateway announces working test chip
Edinburgh -- March 20th, 2008 -- Spiral Gateway Ltd., the Edinburgh based semiconductor company, announces fully functional and validated samples of its RICA test chip; the Reconfigurable Instruction Cell Array (RICA) technology is targeted to meet the demands of image signal processing in the next generation of mobile phones. It has received fully working samples of its test chip back, demonstrating the RICA array and successfully proving the concepts of the underlying technology, including full dynamic reconfigurability and multiple application capability. This represents a major step in bringing the RICA technology to market.
The chip was developed and manufactured in partnership with the University of Edinburgh. This partnership allowed the company access to leading technologists, tool flows and fabrication partners in a seamless way.
The company is working on products for the Image Signal Processing market in mobile phones. Existing solutions in this market are either hardwired ASIC devices or software programmable DSP cores. The market is demanding the real time performance levels of hardwired ASIC solutions but with the full programmable flexibility of the software approach and Spiral Gateway’s technology is ideally positioned to meet this need.
Commenting, Chief Executive Officer of Spiral Gateway, Graham Townsend, said, “We are pleased to have demonstrated the underlying RICA technology and show it operating in real time. This gives us great confidence of delivering a disruptive solution to the ISP market with first full product prototypes later this year.”
Tom Higgison from the University’s commercialisation company ERI added, “This is a superb achievement by Spiral Gateway, providing further validation of the University of Edinburgh’s leading edge research. We are committed to providing a solid technology base and world class facilities and promoting the growth of Scotland’s most innovative companies.”
About Spiral Gateway Ltd.
Spiral Gateway is developing Image Signal Processing chips for the mobile phone market. The company was incorporated in 2004 and is a spin-out from the University of Edinburgh. It is backed by a consortium of investors led by Braveheart Investment Group plc., the commercialisation and investment management company.
The chip was developed and manufactured in partnership with the University of Edinburgh. This partnership allowed the company access to leading technologists, tool flows and fabrication partners in a seamless way.
The company is working on products for the Image Signal Processing market in mobile phones. Existing solutions in this market are either hardwired ASIC devices or software programmable DSP cores. The market is demanding the real time performance levels of hardwired ASIC solutions but with the full programmable flexibility of the software approach and Spiral Gateway’s technology is ideally positioned to meet this need.
Commenting, Chief Executive Officer of Spiral Gateway, Graham Townsend, said, “We are pleased to have demonstrated the underlying RICA technology and show it operating in real time. This gives us great confidence of delivering a disruptive solution to the ISP market with first full product prototypes later this year.”
Tom Higgison from the University’s commercialisation company ERI added, “This is a superb achievement by Spiral Gateway, providing further validation of the University of Edinburgh’s leading edge research. We are committed to providing a solid technology base and world class facilities and promoting the growth of Scotland’s most innovative companies.”
About Spiral Gateway Ltd.
Spiral Gateway is developing Image Signal Processing chips for the mobile phone market. The company was incorporated in 2004 and is a spin-out from the University of Edinburgh. It is backed by a consortium of investors led by Braveheart Investment Group plc., the commercialisation and investment management company.
|
||||||
Related News
- Tiempo, Working with STMicroelectronics, Unveils First 32nm Clockless Test Chip
- Spiral Gateway preps C-programmable low-power fabric
- VESA Releases Compliance Test Specification Model for DisplayPort Automotive Extensions Standard
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
|
E-mail This Article | 
|
|
Printer-Friendly Page |