Cadence Low-Power Solution Enables Fujitsu Microelectronics Tapeout of 65nm WiMAX Design

Fujitsu Reference Design Flow 3.0 Uses Common Power Format to Achieve Fast Ramp to Volume Production of Low-Power Consumer Product

SAN JOSE, Calif. -- Jan 12, 2009 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global design innovation, announced today that Fujitsu Microelectronics Limited has taped out a 65nm mobile WiMAX design using Fujitsu Reference Design Flow 3.0, which includes Common Power Format (CPF) enabled Cadence® Low-Power technologies. The use of these technologies enabled Fujitsu Microelectronics to reduce leakage power by 88 percent and reduce overall power consumption by 36 percent.

“The CPF-enabled Cadence Low-Power Solution allowed us to raise the bar on low-power design, with more power saving and reduced turnaround time,” said Nobuhiko Aneha, deputy general manager of the mobile solution division of Fujitsu Microelectronics Ltd. “This is a proven solution for us, and we will continue to deploy it for other low-power designs.”

The development, first unveiled by Fujitsu Microelectronics at the Cadence DA SHOW/CDNLive! conference in Japan, demonstrates that the Cadence Low-Power Solution continues to gain momentum as an essential production-quality, robust low-power design solution backed by real design tapeouts.

A number of technologies in the Cadence Low-Power Solution were responsible for the result. The automated power shut-off flow in Encounter digital implementation helped Fujitsu Microelectronics achieve about 50 percent reduction in physical design turnaround time compared to previous methodologies. The CPF-based Incisive® Simulation technology allowed Fujitsu Microelectronics to run logic simulation of the power shutoff feature without requiring custom programming language interfaces (PLIs). The Cadence Conformal® Low-Power software verified the low-power design rules through structural and functional verification, while both Incisive and Conformal low-power verification technologies contributed to the improved quality of silicon for this design.

“Since inception, the CPF-enabled Cadence Low-Power Solution has gained recognition in the industry for being able to deliver on real production designs,” said Dave Desharnais, group director of IC Digital products at Cadence. “Cadence is delighted to be part of Fujitsu Microelectronics’ recent successful design tapeout, and will continue to support Fujitsu Microelectronics in its low-power design methodology.”

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.