Intilop (formerly Intelop) corporation's TCP Offload engine IP solution delivers amazing TCP/IP throughput as reported by customers in system level performance testing
This second generation Customizable Full TCP offload Engine also integrates GEMAC, ARP module, RDMA engines, PLB/405 bus interfaces. It is capable of implementing/accelerating hundreds of simultaneous TCP sessions, delivering 800 % -1500% performance improvement over TCP/IP software implementations.
Santa Clara, California – March 22, 2010.
The performance data is available upon request. Customer’s name is not released due to NDA terms.
It is the only TOE engine that allows customers to customize TCP/IP related differentiated features and integrates so many other functions in hardware. All of TCP-connection related tasks, TCP-Payload transfer tasks, TCP-disconnection, TCP-session management overhead which traditionally is performed by TCP/IP software is accomplished by the hardware engines in TOE resulting in an order magnitude performance improvement. It is a new paradigm and new level of integration in networking hardware acceleration.
Because of its advanced scalable architecture, it can be customized to implement differentiated features and performance requirements to meet customer’s specifications e.g. misc. protocol processing and monitoring at G-bit line rate, in addition to TCP/IP, ARP module, number of simultaneous connections, TCP/IP performance tuning based upon type of network/traffic and application usage, scalable packet FIFO size, scalable size of Session Management table, Session Parameters, scalable size of direct store Packet memories, integrated DDRn/SSRAM controllers (optional), choice of PHY interface - GMII or Serial and more.
This Integrated TOE SoC silicon IP with customizable features provides enhanced functionality in all networking equipment including; Layer-2-5 Switches/Routers, IPS/IDS appliances and Network Security appliances, Severs and high end NICs. Advanced architecture with built in scalability allows customers to target it to many silicon libraries from FPGAs to 0.18 um-0.090 nm ASIC or SOC without compromising performance or functionality.
“We utilized our expertise in designing highly successful and advanced technology Multi-Giga bit Networking equipment, Enterprise-class IDS/IPS, Network Security appliances employing SOCs also designed by intilop in defining the architecture of this TOE engine,” said K Masood. “We are excited about this new crown jewel and the ability to develop value-added leading edge network acceleration IPs and total solutions for our customers.” said Kevin Moore of Intilop.
Intilop Corporation is a custom IP developer, SoC/ASIC/FPGA integrator and engineering services provider for Networking, Network Security, Network/storage and Embedded Systems. They offer silicon proven semiconductor IP and services with comprehensive hardware and software experience. http://www.intilop.com
|
Related News
- Intelop corporation's TCP Offload engine IP delivers amazing TCP/IP throughput
- Intilop delivers their enhanced Dual 10G iNICs with Ultra-low latency TCP and UDP Offload accelerators, benchmarking sub micro second wire-to-host latency and Ultra high data throughput
- Intilop delivers Nano-TOE IP Core with another record breaking Ultra-Low latency of 76 nanoseconds & 20 G bit bandwidth for high performance networking applications
- Intilop TCP Offload Engine Delivers Full TCP Offload in Less than 100 nanoseconds Using Altera's Stratix IV FPGA
- Intilop Corporation's Live Demo of its 3rd Generation Enhanced Ultralow latency 10G bit TCP Offload Engine and Total system solution for the Financial Markets received tremendous interest at the 'Low Latency Summit' in NYC.
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |