Arasan Chip Systems showcases its embedded Software and System Tools complementing its IP Portfolio at ESC

Visit Arasan at Booth #620, to learn about the growing importance of software and system tools for semiconductor IP integration in SoCs and embedded systems

San Jose, California - April 19, 2010 - Arasan Chip Systems, Inc. ("Arasan"), a leading provider of Total Semiconductor IP Solutions, announced that it is exhibiting its leading IP Portfolio, Software and System Tools at Booth #620 in the Embedded Systems Conference (ESC), to be held between April 26-29, 2010 in San Jose, California.

ESC is a premier event bringing together system designers, architects and software experts that enable the development of a complete end-product. Arasan, with its Total IP Solutions approach to semiconductor IP, provides all of the collateral necessary to integrate complex interface IP into SoCs. Extending its IP collateral, Arasan also offers the industry's most comprehensive SD/SDIO and MIPI® SLIMBus® Tester & Analyzer product as part of its System Tools product line, which it will demo in its booth.

SoC design teams are stretched thin, facing multiple constraints such as higher speed interfaces, increased functionality and reduced time-to-market. Their reliance on external IP providers is only increasing. Commenting on this trend, Ram Gopalan, Senior Director of Corporate Marketing at Arasan said, "What is increasingly becoming necessary is a Total IP Solution that helps SoC teams succeed in their overall project objectives. System Tools such as software drivers/stacks, hardware platforms for development and validation, tools like protocol analyzers and services/support play an important role in the integration of IP into SoCs."

Arasan will be demonstrating their SLIMbus® Analyzer product consisting of an exerciser tool to generate traffic and an analyzer that captures and processes SLIMbus® transactions. Additionally an SD/SDIO Analyzer will also be on display. These tools can be run over a network so as to be controlled from a remote location using an intuitive GUI interface. These products are also capable of functioning as a reference design, consisting of the IP and software stack, to be used during SoC design. These versatile system tools can be used throughout the design phase up to production testing of end-systems. Also on display will be a number of the Hardware platforms and Software Stacks which facilitate the integration of IP into SoCs across domains like Flash memory controllers, Ethernet, USB and MIPI® Bus interconnects.

Arasan's engineering teams go beyond delivering and supporting IP - to a more consultative engagement with customers, enabling the technological adoption of leading interconnect standards. Our expanding portfolio now includes PHY IPs which are the crucial building block for implementing efficient interconnects. 

Arasan provides all of the IP collateral to enable the rapid integration of interface IP into SoCs, chipsets and application processors. This Total IP Solution consists of RTL IP, PHY IP, verification IP, software stacks, hardware platforms for development and validation - all backed by our World-class customer support.

About Arasan

Enabling Technology Adoption through Total IP Solutions - The Bus Stops Here! 

Arasan Chip Systems based in San Jose, CA, USA, is a world-leading supplier of SoC Intellectual Property Solutions with a successful 15 year track record. Arasan delivers technology-leading IP focused on Bus Interfaces such as MIPI, SDIO, USB, PCIe, Ethernet, and Flash Storage Solutions of NAND, eMMC, SD, CF+, UFS and more, to the global electronics market. Arasan's Total Solution Approach starts with Technology Consulting using our Domain Expertise and includes all the building blocks required for technology adoption- RTL IP cores, Analog Mixed Signal IP Cores, Verification IP,  Portable Software Drivers / Stacks, Protocol Test & Analyzers, HDK's, and associated design services. Arasan Total IP Solution enables the rapid adoption of emerging technologies reducing our customer's time to market while minimizing risk and ensuring compliance to respective standards. 

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