English
Intel's 22-nm tri-gate SoC, how low can you leak?
Sylvie Barak, EETimes
12/10/2012 4:30 PM EST
SAN FRANCISCO -- Intel will describe its 22-nm tri-gate (FinFET) SoC technology for mobile applications Monday (Dec. 10) at the International Electron Devices Meeting (IEDM) here.
The chip maker introduced a CPU version of its 22-nm offering in June, but Intel senior fellow Mark Bohr said in an interview that the recipe has been tweaked in order to scale down to a more mobile, ultra-low leakage version.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Tabula Confirms Move to Intel's 22nm Process Featuring 3-D Tri-Gate Transistors
- Intel tips 22-nm tri-gate, but mobile is MIA
- Flex Logix Joins Intel Foundry Services Accelerator IP Alliance to Enable Fast, Low Power, Reconfigurable SoC's
- Intel Custom Foundry Certifies Synopsys Design Platform for Intel's 22nm FinFET Low Power Process Technology
- How will Intel's purchase of Altera affect embedded space?
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design