Dream Chip and Tensilica Partner for Imaging/Video Development on the New IVP DSP

Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)

SANTA CLARA, Calif.  USA and GARBSEN, Germany – February 12, 2013 –  Tensilica, Inc. and Dream Chip Technologies (DCT) today announced that they are partnering to port and optimize DCT’s video and image signal processing software to Tensilica’s new IVP imaging DSP (digital signal processor). DCT has been a Tensilica Xtensions partner for a couple of years and will help support new joint customers with their extensive imaging, video and Xtensa DPU background.

“As DCT already was a Tensilica partner with extensive image and video signal processing expertise, they were a natural choice to be an early partner for our IVP product, and they helped greatly during early development stages,” stated Gary Brown, Tensilica’s director of imaging/video. “With their expertise in imaging and video software, hardware integration, and our processors, Dream Chip is an ideal design partner for many of our customers.”

“Tensilica’s customizable dataplane processors are a natural fit for implementing video, imaging and gesture recognition algorithms,” stated Peter Schaper, CEO of DCT. “By optimizing the IVP instruction set for imaging and video, Tensilica has developed a very efficient, low-power IP core. Moreover, Tensilica provides best-in-class programming/development tools, all C-Code based, which makes for easier software porting and maintenance.”

 IVP is an imaging and video dataplane processor (DPU) that is ideal for the complex image, video and gesture recognition signal processing functions in mobile handsets, tablets, digital televisions (DTV), automotive, video games and computer vision based applications. The IVP DSP has a unique instruction set tuned for imaging and video pixel processing that gives it an instruction throughput of over 16x the number of 16-bit pixel operations compared to that of the typical host CPU with single-issue vector instructions. In addition to its raw instruction throughput advantage to host CPUs, the imaging specific compound instructions supported by IVP give it a higher peak performance of 10 to 20x and much higher energy efficiency.  IVP’s rich instruction set has more than 300 imaging, video and vision-oriented vector operations, each of which applies to 32 or more 16-bit pixels per cycle.

About Dream Chip Technologies

Dream Chip Technologies is a German engineering company supporting their European customers with SOC, FPGA, and embedded software designs for the consumer, industrial and automotive industry. DCT has a strong record in image and video processing developments, for more information please visit www.dreamchip.de

About Tensilica

Tensilica, Inc. is the leader in dataplane processor IP cores, with over 200 licensees. Dataplane processors (DPUs) combine the best capabilities of DSPs and CPUs while delivering 10 to 100x the performance because they can be optimized using Tensilica’s automated design tools to meet specific and demanding signal processing performance targets. Tensilica’s DPUs power SOC designs at system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. Tensilica offers standard cores and hardware/software solutions that can be used as is or easily customized by semiconductor companies and OEMs for added differentiation. For more information on Tensilica’s patented, benchmark-proven DPUs visit www.tensilica.com.

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