Evatronix Enhances Its MIPI SLIMbus Device IP with New Customization Options
Update: Cadence Completes Acquisition of Evatronix IP Business (Jun 13, 2013)
Silicon-proven MIPI SLIMbus Device IP receives an update that broadens the customization options and facilitates control of connected devices.
Bielsko-Biala, Poland -- April 16, 2013 - The silicon intellectual property (IP) provider, Evatronix SA introduced today the latest, 6th generation of the MIPI SLIMbus Device IP controller dedicated for low power mobile applications. Similarly to previous iterations of the IP, also this time the improvements in the architecture reflect the feedback Evatronix have received from their growing base of SLIMbus customers.
“We’re happy to lead the MIPI SLIMbus IP market with the components that feature highest available customizability while retaining full compatibility with the standard,” said Marcin Zys, Multimedia IP Product Line Manager at Evatronix. “The changes we’ve introduced this time give even more options to the user and put him in total control of the interaction between the IP and the application.”
In this release the strongest focus was put on enhancing the device’s customizability and making it easily adoptable for both simple audio devices like MEMS microphones as well as advanced audio processors targeted for high end mobile applications. Additional parameters and configuration inputs allow user to select desired functionality and tailor the IP to requirements of his application according to the rule “all you need, nothing you don’t”.
On one hand, the smallest 1-port configuration of the IP occupies less than 9k gates while retaining full compliance with the standard, which makes it perfect for simple MEMS chips. On the other hand, implementation of full control over Data Ports and Control Port functionality allows for seamless integration in advanced audio processor chips, and makes data and control communication between application and SLIMbus really straightforward.
Thanks to the implementation of User Information Elements and User Interrupts, and extended support for User Value Elements, user application may fully benefit from bidirectional control data communication through SLIMbus. That includes not only transactions initiated from SLIMbus manager side, but also actions triggered by the application with User Interrupt and REPORT_INFORMATION messages.
Last but not least, this version adds the ability to calculate the numbers of linked ports. It utilizes the SLIMbus channel linking mechanism and relieves the application from determining data ports that are carrying connected audio data (stereo, quad, 5.1, etc.).
ABOUT EVATRONIX
Evatronix develops digital and mixed-signal Intellectual Property (IP) cores with complementary software and supporting application environments. We embrace hardware, software and design services elements to assist our customers in all SoC development stages, from concept to tape-out. In more than 20 years of history, Evatronix provided over 600 licenses for 8051, USB, NAND Flash, SDIO and multimedia solutions. We are headquartered in Poland, and employ more than 90 people worldwide.
For more information please visit the company’s website at www.evatronix.com/ip
|
Related News
- Evatronix Strengthens its Multimedia IP Portfolio with a Complete Series of MIPI SLIMbus Products
- Evatronix Joins the Series of Live Workshops on MIPI SLIMbus organized by LnK
- Evatronix Develops MIPI SLIMbus IP To Help LnK Introduce their New Product - I2S to SLIMbus Audio Bridge
- Arasan Announces immediate availability of its I3C Host / Device Dual Role Controller IP
- MIPI Alliance Releases A-PHY v1.1, Doubling Maximum Data Rate and Adding New Implementation Options to Automotive SerDes Interface
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |