Lattice Simplifies Optical Ethernet System Management Interfaces
New reference design enabled multi-gigabit IEEE 802.3 MDIO interface controller based on small, low power, MachXO3 and ECP5 families
HILLSBORO, OR August 6, 2014 - Lattice Semiconductor Corporation (NASDAQ: LSCC) the leader in low power, small form factor, customizable solutions, is helping engineers quickly implement optical Ethernet designs up to 100Gb/s with the publication of a new reference design for IEEE 802.3 Management Data Input/Output (MDIO) interface controllers.
Reference design RD1194 uses the world’s smallest, lowest cost per I/O programmable platform, the MachXO3™ family, or the new ECP5™ family. The ECP5 features the industry’s highest functional density with up to 85k LUTs and SERDES in tiny 10mm x 10mm packages. With their small size and low power, MachXO3 and ECP5 devices are perfect for implementing I/O expansion, bridging or connectivity needed to deliver Multi gigabit Ethernet applications such as CFP2/4 modules.
Designers can use the reference design to implement a simple Wishbone user logic interface that enables the user to access the PHY registers. It supports MDIO IEEE 802.3 Clause 45/22 master/slave controllers and features pre-amble pattern selection through the input port.
To learn more, please visit www.latticesemi.com/MDIO
About Lattice Semiconductor
Lattice Semiconductor (NASDAQ: LSCC) is the leader in low power, small form factor, low cost, customizable solutions for a quickly changing connected world. From making smart consumer devices smarter, to enabling intelligent industrial automation, or connecting anything to everything in communications, electronics manufacturers around the world use Lattice’s solutions for fast time to market, product innovation, and competitive differentiation. For more information, visit www.latticesemi.com.
|
Related News
- IEEE Standards Association Announces IEEE 802.3 Projects to Meet Industry Demands for Higher Ethernet Speeds
- Micrel and Marvell Deliver World's First Standards-Compliant Ethernet PHYs for In-Vehicle Networking
- IEEE 802.3 Ethernet Bandwidth Assessment Ad Hoc Group Launched
- Mentor Graphics Broadens Support of OVM Compliant Verification IP for IEEE802.3-2005 Gigabit Ethernet-based Designs
- IEEE 802.3 forms residential Ethernet study group
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |