Software Defined Radio with Spread spectrum and SOQPSK for Telemetry applications
MegaChips Utilizes Cadence Tensilica Xtensa Processor in Ultra-Low Power Internet of Things Sensor Hub IC
Xtensa Processor Selected After Competitive Benchmark Shows 90 Percent Lower Power Consumption for Arithmetic Operations
SAN JOSE, Calif., 09 Feb 2015 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Tensilica® Xtensa® processor has been designed as the core of the MegaChips frizz always-on sensor hub IC. MegaChips selected the Xtensa processor after completing a competitive benchmark that showed the Xtensa processor offered over 90 percent lower power consumption when used for pedestrian dead reckoning algorithms, which require Kalman filters.
For more information on the Xtensa processor, visit www.cadence.com/news/xtensa/megachips.
frizz is a next-generation always-on sensor hub chip designed for smartphones and Internet-of-Things (IoT) wearable devices. MegaChips took advantage of the ultra-low power Xtensa processor architecture, which can perform both control and digital signal processing (DSP), customizing it for maximum throughput with three-way very long instruction word (VLIW) processing, floating point, and four-way single instruction, multiple data (SIMD) processing. By utilizing the highly flexible and automated optimization capabilities of the Xtensa processors, MegaChips was able to achieve optimum power, performance and area results for its frizz battery-operated sensor hub IC.
“We were able to take advantage of the Xtensa processor customization capabilities in this design in a short amount of time, thanks to the Tensilica automated design tools,” said Kenji Nakamura, deputy general manager, AS business Headquarters at MegaChips. “No other customizable processor allows designers to integrate a four-way SIMD and VLIW for maximum throughput with 32-bit RISC control processing, which is required for best power/performance in many IoT applications. These extra capabilities can give frizz a significant advantage in the market and allow frizz to achieve the right low-power profile for wearables.”
MegaChips has been an authorized Tensilica design center since 2008 and has completed many designs using Tensilica processors. The Xtensa processor can be customized to handle both performance-intensive DSP and embedded control processing functions on a single core. The patented automated Xtensa Processor Generator allows designers to create more competitive and differentiated features while achieving very low power consumption.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Espressif Systems Internet of Things WiFi Chips Employ Cadence Tensilica Xtensa Low-Power Processor for Control and DSP
- Newracom Announces Availability of Ultra-Low Power ARM Core Based Wi-Fi 802.11 b/g/n MAC/PHY/Subsystem and RFIC IP for Internet of Things Applications
- mCube Unveils Its First Ultra-Low Power Accelerometer Family Optimized for Wearables and the "Internet of Moving Things"
- Atmel and MXCHIP Collaborate to Bring Ultra-low Power Wi-Fi Platform With Secure Cloud Access for Internet of Things Applications
- Atmel Expands Ultra-low Power SAM G ARM Cortex M4 MCU Portfolio for Wearables and Sensor Hub Management
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- Ceva, Inc. Announces First Quarter 2025 Financial Results
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |