Andes Technology Announces Return of the Annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel

RISC-V CON Features Keynotes from Andes, Intel, Sonical, Crypto Quantique, Green Hills Software and Imperas

SAN JOSE, CA – October 10, 2022— Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, announces the return of its annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel. The RISC-V CON program will include keynotes from Intel Foundry Services, Intel RISC-V Ventures, SoC developer Sonical, and Andes along with technical talks and panel from RISC-V ecosystem partners including Crypto Quantique, Green Hills Software, IAR Systems and Imperas.

Andes Technology President & CTO, Dr. Charlie Su, will begin the program at 10:00 AM with his presentation, “Expanding the RISC-V Horizon.” “It is no secret that RISC-V architecture is growing, its membership is rising, and the RISC-V ecosystem is flourishing,” Dr. Su observed. “All in an unprecedented speed. In my talk, I will examine the expanding range of applications RISC-V serves and how Andes RISC-V solutions help drive this open instruction set architecture’s fast adoptions. I will also talk about Andes RISC-V cores coming on the horizon.”

Keynotes from Bob Brennan, Vice President of Intel Foundry Services and Vijay Krishnan, General Manager, RISC-V Ventures of Intel will respectively address how RISC-V flourishes in a new foundry era and how Intel enables RISC-V for AIoT and edge applications. Sonical will present their next generation of hearable devices using RISC-V. In addition, RISC-V ecosystem talks from Crypto Quantique, Green Hills Software and Imperas will introduce their optimized RISC-V solutions and tools perfect for applications including IoT, functional safety, security and more.

The conference program runs from 10:00 AM to 4:05 PM with lunch and an evening reception included. During the reception, prize drawings will award personal electronics containing Andes RISC-V CPU IP to lucky attendees. Dan Nenni, founder of SemiWiki.com, the open forum for semiconductor professionals, will moderate the “RISC-V Ecosystem Panel: From Edge to Cloud“ that will begin immediately after lunch. The conference is free and it is open to qualified registrants such as design engineers, engineering managers, marketing people and business development personnel. The exhibition accompanying the conference program will showcase MPU development board from Renesas, AI development kit with camera module from Canaan, high-performance industrial-grade microcontrollers from HPMicro, Bluetooth development kit from Telink and Arduino-compatible boards containing RISC-V CPU IP as well as Sonical detailing their Headphone 3.0., the next generation of hearable devices, that unlocks untapped resource of biometric data. To register, click https://Andes_RISC-V_CON_2022_US.eventbrite.com/?aff=PR

About Andes Technology

Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com.

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