32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Creonic Introduces NCR Processor IP Core for DVB-S2X/DVB-RCS2 Satellite Communication
Kaiserslautern, Germany, September 07, 2023 - Creonic GmbH, the leading provider of IP cores for communication systems, is proud to unveil its latest addition, the NCR Processor IP core. Designed to cater to the specialized needs of the satellite communication industry, this state-of-the-art IP core is set to facilitate clock synchronization and reference source solutions.
Network Clock Reference (NCR) plays a pivotal role in ensuring precise time synchronization between satellites and user terminals. The NCR Processor IP core facilitates the dissemination of master clock information from the satellite to all connected user terminals. Traditionally, NCR packets are transmitted periodically over continuous DVB-S2 or DVB-S2X links. User terminals then utilize this master clock knowledge to regulate data transmission in time-division multiple access (TDMA) systems, such as DVB-RCS or DVB-RCS2. In TDMA systems, multiple terminals share the same frequency band, necessitating a strict transmission schedule.
Related |
NCR Processor ![]() |
Creonic's NCR Processor IP core is equipped with two key functionalities:
-
The NCR tracker within the IP core provides a local NCR clock, which is frequency- and phase-latched to incoming DVB-S2/DVB-S2X streams containing NCR information.
-
The NCR local clock offers a precisely settable NCR source clock, provided a stable 27 MHz clock and a precise 1 PPS (Pulse Per Second) source are available.
Its AXI4-Lite interface allows for simplier configuration and retrieval of status information. Moreover, the NCR Processor IP core seamlessly integrates with other Creonic components, including the DVB-S2X Modulator and Demodulator, DVB-S2X Decoder and DVB-RCS2 Modulator, making it a versatile choice for satellite communication systems.
With comprehensive deliverables such as HDL simulation models, VHDL testbench, C++ firmware, and extensive documentation, Creonic ensures a seamless integration experience for its customers.
For licensing and further information, please contact Creonic or visit www.creonic.com
About Creonic GmbH
Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for wired, wireless, fiber, and free-space optical communications. All relevant digital signal processing algorithms are covered, including, but not limited to, forward error correction, modulation, equalization, and demodulation.
The company offers the richest product portfolio in this field, covering standards like 3GPP 5G, DVB-S2X, DVB-RCS2, CCSDS, and WiFi.
The products are applicable for ASIC and FPGA technologies and comply with the highest requirements with respect to quality and performance.
For more information please visit www.creonic.com.
|
Creonic Hot IP
Related News
- Creonic Expands Satellite IP Core Portfolio with DVB-S2X Multi-Carrier Demodulator
- Creonic Releases DVB-RCS2 Multi-carrier Satellite Receiver IP Core
- Creonic Offers High-throughput Single-chip DVB-S2X Satellite Modem for Zynq UltraScale+ RFSoC
- DVB-RCS2 Satellite Modulator IP Core from Creonic Now Available
- Creonic Starts Wideband Satellite Initiative with Launch of New DVB-S2X IP Cores
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |