Arasan proudly introduces the VESA VDC-M Encoder and Decoder IP
March 13, 2024 -- San Jose, CA -- Arasan proudly introduces the VESA VDC-M Encoder and Decoder IP as part of its Total Display IP Solution for Mobile, Automobile, and Multimedia SoCs. Our comprehensive offering encompasses MIPI DSI IP, C-PHY IP, D-PHY IP, VESA DSC Encoder and Decoder IP, along with the new addition of VESA VDC-M IP.
Step into the future of digital media with Arasan’s VESA VDC-M v1.2 Encoder and Decoder IP, a revolutionary product reshaping video compression technology. Boasting unparalleled efficiency and superior quality, our solution caters to diverse digital applications. Arasan’s proven design discipline and rapid product development ensure swift silicon success for both analog and digital IP.
Tailored for mobile devices, VDC-M stands out with specialized optimization, while DSC serves as a versatile compression standard applicable across various display types.
In the grand scheme, Arasan’s VDC-M plays a pivotal role in optimizing video content display on digital applications, striking the right balance between performance and power efficiency.
Features of VESA VDC-M :
- Advanced Encoding / Decoding Mechanisms
- Configurable High-Resolution Support
- Adjustable Bit Rate
- Versatile Video Format Support
- Parallel Slice Encoding
- Ultra-low Latency
- Power Efficient Design
The VESA VDC-M Encoder IP and Decoder IP are available to license immediately. Please contact Arasan sales.
About Arasan:
Arasan Chip Systems is a leading provider of IP for mobile storage and mobile connectivity interfaces, with over a billion chips shipped with our IP. Our high-quality, silicon-proven Total IP Solutions encompass digital IP, Analog Mixed Signal PHY IP, Verification IP, HDK, and Software. With a strong focus on mobile SoCs, we have been at the forefront of the “Mobile” evolution since the mid-90s, supporting various mobile devices, including smartphones, automobiles, drones, and IoT devices, with our standards-based IP.
|
Arasan Chip Systems Hot IP
Related News
- Alma Technologies Launches Scalable Encoder and Decoder Semiconductor IP for VESA DSC 1.2b Visually Lossless Compression
- New VDC-M (VESA Display Compression-M) IP Cores Launched By Hardent
- VESA Publishes Display Compression Standard for Mobile Applications
- MIPI Alliance and VESA Enable Next Generation of High-Performance Displays for Mobile, AR/VR, Automotive, Other Applications
- Hardent to Showcase the Industry's First VESA DSC Encoder/Decoder IPs at CES 2015
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |