Synopsys Expands Semiconductor IP Portfolio With Acquisition of Intrinsic ID
SUNNYVALE, Calif., March 20, 2024 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that it has completed the acquisition of Intrinsic ID, a leading provider of Physical Unclonable Function (PUF) IP used in the design of system-on-chips (SoCs). The acquisition adds production proven PUF IP to Synopsys' broadly used semiconductor IP portfolio, enabling SoC designers worldwide to protect their SoCs by generating a unique identifier on chip utilizing the inherent and distinctive characteristics of every silicon chip. The acquisition also adds Intrinsic ID's team of experienced research and development engineers who have deep expertise in PUF technology. The terms of the deal, which are not material to Synopsys financials, are not being disclosed.
"In our increasingly connected world, chip designers are integrating PUF technology in their SoCs for many applications, including identification and the creation of a product ID for track and trace," said Joachim Kunkel, general manager of the Solutions Group at Synopsys. "The acquisition of Intrinsic ID complements our extensive semiconductor IP portfolio, further helping designers create SoCs that are at the heart of today's smart and connected devices. We look forward to expanding our R&D presence in the Netherlands with Intrinsic ID's team and establishing a center of excellence for PUF technology in Eindhoven."
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration and silicon bring-up, Synopsys' IP Accelerated initiative provides architecture design expertise, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot IP
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys Expands the Industry's Highest Performance Hardware-Assisted Verification Portfolio to Propel Next-Generation Semiconductor and Design Innovation
- Ansys Signs Definitive Agreement to Acquire Diakopto, Expands Multiphysics Simulation Portfolio for Semiconductor Designers
- Synopsys Expands DesignWare IP Portfolio with Acquisition of Kilopass Technology
- Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation
- Oxford Semiconductor Acquires TransDimension; Acquisition Expands Portfolio of Connectivity Products Addressing High-Growth Markets
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |