32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Analog Bits to Demonstrate Power Management and Embedded Clocking and High Accuracy Sensor IP at the TSMC 2024 Open Innovation Platform Ecosystem Forum
Sunnyvale, CA, September 23, 2024 - Analog Bits (www.analogbits.com), the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions will be demonstrating their newest LDO IP, Power supply droop detectors, Embedded Clock LC PLL’s, and more in TSMC N3P process at their booth at the TSMC 2024 Open Innovation Platform Ecosystem Forum in Santa Clara Convention Center, Santa Clara, California. This demonstration is showcasing Analog Bits’ industry leading portfolio of Mixed Signal IP in advanced 3nm, 4nm, and 5nm processes. Analog Bits has also taped out their next generation N2P IPs.
“Analog Bits continues to innovate and solve harder SoC design challenges for customers designing in N3 and N2 processes which manifests as novel IP’s,” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “With SoC’s increasingly multicore managing power into the cores is imperative. We have designed novel LDO macros that can be easily scaled, arrayed and shared adjacent to CPU cores and simultaneously monitoring power supply health with our detector macros allowing customers to balance power real time. It is like PLL’s that maintain clocking stability; we are now able to offer IP’s to maintain power integrity in real time. Come and see our demos and also come and sample Analog Bits 2024 holiday wine at our booth.”
- When: September 25th, 2024
- Location: Santa Clara Convention Center, Booth #708
- Register
Resources
To learn more about Analog Bits' foundational analog IP, visit www.analogbits.com or email us at info@analogbits.com.
About Analog Bits
Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs.
Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s.
With billions of IP cores fabricated in customer silicon, from 0.35 micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
|
Related News
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Analog Bits to Demonstrate Automotive Grade IP's Including a Novel High Accuracy Sensor at TSMC 2023 North America Open Innovation Platform Ecosystem Forum
- Analog Bits to Demonstrate New High Performance and Ultra-Low Power SERDES IP at TSMC Open Innovation Platform Ecosystem Forum
- Analog Bits to Demonstrate Pinless PLL and Sensor IP in TSMC N4 and N5 Processes at TSMC 2022 North America Open Innovation Platform® Ecosystem Forum
- Analog Bits to demonstrate Low Power SERDES at TSMC's Open Innovation Platform Ecosystem Forum
Breaking News
- RISC-V International Promotes Andrea Gallo to CEO
- See the 2025 Best Edge AI Processor IP at the Embedded Vision Summit
- Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- Keysom Unveils Keysom Core Explorer V1.0
Most Popular
- RISC-V Royalty-Driven Revenue to Exceed License Revenue by 2027
- SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |