M2000 starts offering IP cores and tools that marry ASIC and FPGA design

San Jose, Calif. - More than a few chip companies have tried their hand at embedding blocks of FPGA logic into otherwise-hardwired ASIC devices. Startup M2000 says it wants to be the first to make a business out of it.

In the coming months, the reclusive company will open its doors to customers outside the close network of partners with which it has been working for more than three years. By November, M2000 (Bievres, France) will start offering intellectual-property (IP) cores and tools that will marry ASIC and FPGA design, said chief executive officer Frederic Reblewski.

Though the company is small and relatively unknown, the 15-person team at M2000 is hardly new to FPGA technology. The company was started in 1996 by the founders of FPGA-based emulation vendor Meta Systems, which was bought by Mentor Graphics Corp. the same year. The founders hold many patents related to configurable logic and its use for electronic system testing.

It's been a long gestation period for M2000, but Reblewski said the company refrained from rushing to market in order to avoid the mistakes made by others. Embedding FPGA blocks into ASICs has been seen as a way to make ASICs more flexible and to reduce development costs, but most of the handful of chip makers and startups that have tried it have retreated because of cost and software issues.

For that reason, M2000 said it has put most of its effort into ensuring that it has the right software tools and a high-density FPGA fabric. The company's proposed design flow includes the use of commercial synthesis tools along with its own mapping, placement and routing, and configuration tools. After place and route, the tools automatically output an embedded FPGA macro that includes all the data for design-for-test, floor planning and physical verification. SDF files for static timing analysis and Verilog models for simulation are also automatically generated.

As for the FPGA hardware, the company says it is now finishing an eighth-generation device structure, targeting 90-nanometer designs. The cell structure is based on a basic four-input lookup table and SRAM technology.

Where M2000 parts ways with other FPGA vendors is in the architecture. Rather than use uniform routing resources, the company has developed a compiler that tailors the routing to the design, giving it three times the logic density of standard FPGAs. "What others propose in 90 nm is what we propose in 0.15 micron in terms of density," Reblewski said. The company says it can port its FPGA architecture to any foundry within two months.

Another claimed benefit to this approach is that timing becomes more predictable. Reblewski said the company can achieve logic speed of 700 MHz using 0.13-micron design rules. "As soon as we know where to put each element, the timing is known," he said.

Assuming M2000 can deliver the technology as promised, the next question is whether it will fly as a business. Among those that have tried and failed are LSI Logic, Adaptive Silicon and Actel.

Leopard Logic Inc., which started out offering FPGA IP cores, is now fielding semicustom chips that combine fixed logic functions with on-chip FPGA. The one heavyweight to watch in this area is IBM Corp., which has licensed FPGA technology from Xilinx Inc. that it can use in 90-nm ASICs.

M2000 has been working with six partners, in Europe, the United States and Japan, and one of them is said to be shipping chips with the embedded FPGA core for wireless-infrastructure systems. (The only partner that it has disclosed is STMicroelectronics, which worked with M2000 several years ago to design an image sensor that used embedded FPGA gates for reconfigurable logic.)

Moreover, M2000 been raising investment capital since early 2004.

"There are some very big names looking at our technology," Reblewski said. "We are very confident."