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Embedded Systems News

• Nuance Voice Activation Technology Now Available for CEVA-TeakLite Family, World's Lowest Power Audio/Voice DSPs (Tuesday Feb. 27, 2018)
  CEVA today announced the availability of the Nuance AI-powered wake-up and voice activation technology suite on the CEVA-TeakLite family of DSPs.
  
  
• IAR Systems enables high-performance machine learning based on latest neural network library from Arm (Monday Feb. 26, 2018)
  IAR Systems®, the future-proof supplier of software tools and services for embedded development, has added support for CMSIS-NN, Arm®’s new neural network kernels. The support is available for developers using the latest version of IAR Embedded Workbench® for Arm.
  
  
• CEVA and mPerpetuo Partner to Deliver Halide Support for CEVA Vision Processors (Friday Feb. 23, 2018)
  CEVA today announced that it has partnered with mPerpetuo Inc., a Bay Area company specializing in the design of imaging devices and their underlying technologies, to enable Halide functionality on the CEVA-XM family of imaging and vision processors.
  
  
• New Arm Mbed IoT Device Platform capabilities enable companies to get more from their data (Thursday Feb. 22, 2018)
  Forward-thinking enterprises are just starting to utilize the IoT for exploring new ways to collect and analyze their data to gain insights into improving their operational efficiencies, products and customer experiences. But to move from exploring to implementing requires greater levels of IoT device security, connectivity and provisioning than what’s available today, both in the cloud and their data centers.
  
  
• PSA: Next steps toward a common industry framework for secure IoT (Thursday Feb. 22, 2018)
  In October 2017, Arm announced the vision of Platform Security Architecture (PSA) - a common framework to allow everyone in the IoT ecosystem to move forward with stronger, scalable security and greater confidence.
  
  
• Software-Based GPS Receiver from Galileo Satellite Navigation Now Available on Cadence Tensilica Fusion F1 DSP (Tuesday Feb. 20, 2018)
  Cadence and Galileo Satellite Navigation, Ltd. (GSN) today announced that the software-based GNSS global positioning system (GPS) receiver from Galileo Satellite Navigation is now available for the Cadence® Tensilica® Fusion F1 DSP.
  
  
• UltraSoC and Lauterbach RISC-V collaboration furthers vendor-neutral debug and development environment (Tuesday Feb. 20, 2018)
  UltraSoC and Lauterbach today extend their collaboratively delivered universal SoC (system on chip) development and debug environment with the addition of support for the RISC-V open-source processor architecture.
  
  
• Arm's Project Trillium Offers the Industry's Most Scalable, Versatile ML Compute Platform (Tuesday Feb. 13, 2018)
  Arm today announced Project Trillium, a suite of Arm IP including new highly scalable processors that will deliver enhanced machine learning (ML) and neural network (NN) functionality.
  
  
• Silex Inside releases JPEG 2000 AV over IP OEM boards (Wednesday Jan. 31, 2018)
  Silex Inside, formerly known as Barco Silex, a leading provider of AV over IP solutions, has extended its family of Audio/Video over IP OEM boards to include JPEG 2000 encoding and decoding.
  
  
• Synopsys' New ARC HS Development Kit Accelerates Software Development for ARC-based Systems (Monday Jan. 29, 2018)
  The ARC HS Development Kit is a ready-to-use software development platform that includes access to the embARC open source software packages on the embARC website, enabling designers to start software development prior to SoC availability.
  
  
• Imagination Announces Neural Network SDK (Thursday Jan. 25, 2018)
  Imagination Technologies announces the first PowerVR CLDNN SDK for developing neural network applications on PowerVR GPUs. The neural network SDK makes it easy for developers to create Convolutional Neural Networks (CNNs) using PowerVR hardware.
  
  
• Mentor Nucleus RTOS extends system reliability for Arm Cortex v8-A 64-bit processors on multicore SoCs (Friday Jan. 12, 2018)
  Mentor, a Siemens business, today announced the update of the Nucleus® real time operating system (RTOS) targeting high-performance, next-generation applications based on 32- and 64-bit processors on multicore SoCs for industrial, medical, automotive, airborne, and IoT devices.
  
  
• Cadence Tensilica HiFi Audio DSP is the First DSP IP Core to Support Dolby Atmos for PCs (Monday Jan. 08, 2018)
  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Tensilica® HiFi DSP core now supports Dolby Atmos® for PCs, becoming the first DSP IP core to provide this capability.
  
  
• CEVA Introduces ClearVox - Advanced Software Package Providing Enhanced Speech Intelligibility for Voice-Enabled Devices (Monday Jan. 08, 2018)
  CEVA today introduced ClearVox, a new software suite of advanced voice input processing algorithms aimed at enhancing speech intelligibility and voice clarity for voice-enabled devices. ClearVox is licensed exclusively for the CEVA-TeakLite-4 and CEVA-X2 audio/voice DSPs.
  
  
• DSP Group, Emza and Himax Announce Industry's First AI based Human Presence IoT Visual Sensor for Consumer Appliances and Industrial Applications (Tuesday Jan. 02, 2018)
  DSP Group, Emza Visual Sense and Himax Technologies today announced the launch of the WiseEye IoT. This is the industry’s first ultra-low power, always-on, intelligent visual sensor adding human presence awareness for consumer appliances and industrial IoT applications.
  
  
• Inside Secure Delivers Next-generation Content Protection Solutions Extending Leadership in Device Coverage and Early-window Premium Video (Monday Dec. 18, 2017)
  Inside Secure today announced the availability of its most-advanced secure players to date: Content Protection Client HD for Desktop, meeting the increasingly demanding security requirements for browser-based viewing; and Content Protection Client Premium HD,protecting early-window movies.
  
  
• Aldec releases re-configurable FPGA-based accelerators for High Frequency Trading applications (Wednesday Dec. 13, 2017)
  Aldec releases re-configurable FPGA-based accelerators dedicated for executing various types of High Frequency Trading (HFT) strategies demanding extraordinary low latency, throughput and computational power.
  
  
• Microsemi and Imperas Announce Extendable Platform Kit for Microsemi Mi-V RISC-V Soft CPUs (Tuesday Dec. 12, 2017)
  The collaboration delivers the first commercially available instruction set simulator (ISS) for Microsemi's Mi-V ecosystem, a program designed to increase adoption of Microsemi's RISC-V soft CPU product family utilizing RISC-V open instruction set architectures (ISAs).
  
  
• SEGGER presents RTOS, stacks, middleware for RISC-V (Monday Dec. 11, 2017)
  SEGGER presents a new embOS port and its complete stack and middleware portfolio for the Open Source RISC-V CPU architecture.
  
  
• UltraSoC and Percepio partner to offer first complete embedded analytics platform for real-time systems (Wednesday Dec. 06, 2017)
  UltraSoC and Percepio today announced a partnership to produce the industry’s most comprehensive solution for designing and debugging complete, robust real-time systems.
  
  
• IPrium offers the ModemKit for immediate wireless IP Cores evaluation (Tuesday Dec. 05, 2017)
  IPrium LLC has today announced that it now offers the ModemKit hardware platform for its IP Cores, including RF Modems, DVB Modulators, and DVB Demodulators. The ModemKit is a complete set of FPGA/DSP/RF boards, IPrium’s IP Cores, and PC software that can be used for the effective evaluation of wireless communication systems.
  
  
• Green Hills Software Expands Automotive Integrated Cockpit Coverage to NXP i.MX 8 Families (Monday Dec. 04, 2017)
  Green Hills Software today announced the availability of the safe and secure INTEGRITY® real-time operating system (RTOS) and supporting products/services portfolio for the i.MX 8 family of applications processors from NXP® Semiconductors.
  
  
• RISC-V Processor Developer Suite Announced by Imperas (Thursday Nov. 30, 2017)
  The RISC-V Processor Developer Suite contains the models and tools necessary to validate and verify the functionality of a RISC-V processor. It also enables the early estimation of timing performance and power consumption for the processor.
  
  
• Argonne to install Comanche system to explore ARM technology for high-performance computing (Monday Nov. 20, 2017)
  The U.S. Department of Energy’s (DOE) Argonne National Laboratory is collaborating with Hewlett Packard Enterprise (HPE) to provide system software expertise and a development ecosystem for a future high-performance computing (HPC) system based on 64-bit ARM processors.
  
  
• Andes Announces Advanced SoC Development Environments for V5 AndesCore N25 and NX25 Processors with Tool Partners (Monday Nov. 20, 2017)
  Andes Technology today announces the partnership with the world-class tools vendors including Imperas, Lauterbach, Mentor, a Siemens Business, and UltraSoC (in alphabetical order) to bring their system-on-chip (SoC) development environments to Andes V5 processors and the RISC-V community.
  
  
• Andes and Imperas Partner to Deliver Models and Virtual Platforms for Andes RISC-V Cores (Monday Nov. 20, 2017)
  Imperas Software and Andes Technology today announced their partnership to provide Open Virtual Platforms (OVP) models, virtual platforms and software solutions for Andes next-generation processors, based on the RISC-V architecture.
  
  
• Qualcomm Datacenter Technologies Announces Commercial Shipment of Qualcomm Centriq 2400 - The World's First 10nm Server Processor and Highest Performance Arm-based Server Processor Family Ever Designed (Thursday Nov. 09, 2017)
  Qualcomm Datacenter Technologies officially announced commercial shipment of the world’s first and only 10 nanometer server processor series: the Qualcomm Centriq™ 2400 processor family.
  
  
• Mercury Systems Announces Safety Certifiable Graphics for Xilinx Zynq UltraScale+ MPSoC (Thursday Nov. 02, 2017)
  Mercury Systems announced the BuiltSAFE™ GS Multi-Core Renderer for the Xilinx® Zynq® UltraScale+™ MPSoC family. Part of the BuiltSAFE Graphics Suite, the Multi-Core Renderer runs on the multi-core ARM® Cortex® A53 processor inside the MPSoC and is certifiable to DO-178C at the highest design assurance level (DAL-A) as well as the highest Automotive Safety Integrity Level (ASIL D).
  
  
• Lauterbach and SiFive Bring TRACE32 Support for High-Performance RISC-V Cores (Monday Oct. 30, 2017)
  Lauterbach and SiFive today announced the availability of Lauterbach’s TRACE32 toolset to provide debug capabilities for SiFive’s E31 and E51 RISC-V Core IP, based on the free and open RISC-V ISA.
  
  
• Bringing an additional layer of fortification to SoCs powering the next trillion connected devices (Wednesday Oct. 25, 2017)
  Connecting a trillion devices is no easy task of course but doing it securely is key. Especially when the tools and techniques used by attackers are rapidly evolving to go after every piece of system hardware from foundational SoCs to peripheral components. All are seen as an opportunity to access privileged data. With daily occurrences of cyber-attacks, it’s clear security across the entire device needs to be considered at the design stage, not as an afterthought