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FPGA / CPLD News

• LeCroy Corporation Selects Lattice Semiconductor SERDES Evaluation Platform (Monday Apr. 28, 2003)
  LeCroy Corporation Selects Lattice Semiconductor SERDES Evaluation Platform
  
  
• Xilinx Announces Industry's First Complete DDR400 SDRAM Interface Solution For FPGAs (Thursday Apr. 24, 2003)
  Xilinx Announces Industry's First Complete DDR400 SDRAM Interface Solution For FPGAs
  
  
• Xilinx Extends Programmable Systems Leadership With New Embedded Development Kit And MicroBlaze Soft Processor (Wednesday Apr. 23, 2003)
  Xilinx Extends Programmable Systems Leadership With New Embedded Development Kit And MicroBlaze Soft Processor
  
  
• Actel Introduces Next-Generation Programmer for its ProASICPLUS Family of FPGAs (Monday Apr. 21, 2003)
  Actel Introduces Next-Generation Programmer for its ProASICPLUS Family of FPGAs
  
  
• Wireless Meter Reading Enabled by Altera Cyclone FPGAs and Nios Processor (Monday Apr. 14, 2003)
  Wireless Meter Reading Enabled by Altera Cyclone FPGAs and Nios Processor
  
  
• Altera's 0.13-Micron Rollout Continues with Two More Production Qualified Devices Shipping (Monday Apr. 07, 2003)
  Altera's 0.13-Micron Rollout Continues with Two More Production Qualified Devices Shipping
  
  
• Actel Rolls Out New Line of Automotive FPGAs (Monday Apr. 07, 2003)
  Actel Rolls Out New Line of Automotive FPGAs
  
  
• Xilinx Ships World's First 90nm Programmable Chips (Monday Mar. 31, 2003)
  Xilinx Ships World's First 90nm Programmable Chips
  
  
• Vitesse and Xilinx Demonstrate OIF Interoperability Enabling 10Gbps Ethernet at OFC 2003 (Monday Mar. 24, 2003)
  Vitesse and Xilinx Demonstrate OIF Interoperability Enabling 10Gbps Ethernet at OFC 2003
  
  
• Nios Embedded Processor Development Kit Now Available for Altera's Cyclone Devices (Monday Mar. 24, 2003)
  Nios Embedded Processor Development Kit Now Available for Altera's Cyclone Devices
  
  
• Xilinx Slashes Simulation Time From Months To Minutes With Next Generation Software Platform For High-Speed DSP Design (Monday Mar. 17, 2003)
  Xilinx Slashes Simulation Time From Months To Minutes With Next Generation Software Platform For High-Speed DSP Design
  
  
• Altera Optimizes 240 IP Cores for Stratix and Cyclone FPGAs (Monday Mar. 17, 2003)
  Altera Optimizes 240 IP Cores for Stratix and Cyclone FPGAs
  
  
• Actel delivers low-cost starter kit for its flash-based ProASICPLUS FPGAs (Monday Mar. 17, 2003)
  Actel delivers low-cost starter kit for its flash-based ProASICPLUS FPGAs
  
  
• Cypress MicroSystems Introduces Magnetic Card Reader Reference Design for Programmable System on Chip (PSoC) Mixed-Signal Array (Thursday Mar. 13, 2003)
  Cypress MicroSystems Introduces Magnetic Card Reader Reference Design for Programmable System on Chip (PSoC) Mixed-Signal Array
  
  
• Cypress Develops World's Highest-Density Networking SRAM On 90-nm Process Technology (Monday Mar. 10, 2003)
  Cypress Develops World's Highest-Density Networking SRAM On 90-nm Process Technology
  
  
• Xilinx Announces Breakthrough 10 Gbps Technology (Monday Feb. 24, 2003)
  Xilinx Announces Breakthrough 10 Gbps Technology
  
  
• Xilinx and Jungo Software Technologies Accelerate PCI Design Cycle and Reduce System Costs (Wednesday Feb. 19, 2003)
  Xilinx and Jungo Software Technologies Accelerate PCI Design Cycle and Reduce System Costs
  
  
• Altera Announces Nios Embedded Processor Development Kit for Stratix Devices (Wednesday Feb. 19, 2003)
  Altera Announces Nios Embedded Processor Development Kit for Stratix Devices
  
  
• Mentor Graphics and Altera Deliver PCI Express Reference Design (Tuesday Feb. 18, 2003)
  Mentor Graphics and Altera Deliver PCI Express Reference Design
  
  
• Altera Delivers the Goods with Nios Processor Version 3.0, Industry's Leading Soft-Core Processor (Tuesday Feb. 18, 2003)
  Altera Delivers the Goods with Nios Processor Version 3.0, Industry's Leading Soft-Core Processor
  
  
• Xilinx Announces Virtex-II Pro FPGA Development Board (Wednesday Feb. 12, 2003)
  Xilinx Announces Virtex-II Pro FPGA Development Board
  
  
• Actel Strengthens Libero Integrated Design Environment for Next-Generation FPGA Designs (Wednesday Feb. 12, 2003)
  Actel Strengthens Libero Integrated Design Environment for Next-Generation FPGA Designs
  
  
• Altera Expands Stratix Device Family with New Package Offerings (Monday Feb. 10, 2003)
  Altera Expands Stratix Device Family with New Package Offerings
  
  
• Xilinx Delivers HyperTransport Lite Reference Design Using Broadcom Silicon (Wednesday Feb. 05, 2003)
  Xilinx Delivers HyperTransport Lite Reference Design Using Broadcom Silicon
  
  
• Xilinx Ultra-Small CPLD Packaging Enables High Performance Sketchpad DSP Boards for 3DSP (Wednesday Jan. 29, 2003)
  Xilinx Ultra-Small CPLD Packaging Enables High Performance Sketchpad DSP Boards for 3DSP
  
  
• Xilinx® flagship Virtex FPGAs enable dynamic reprogramming (Tuesday Jan. 28, 2003)
  Xilinx® flagship Virtex FPGAs enable dynamic reprogramming
  
  
• Sorrento Networks Selects Lattice’s Ethernet Over SONET Capability for Gigamux DWDM System (Monday Jan. 27, 2003)
  Sorrento Networks Selects Lattice’s Ethernet Over SONET Capability for Gigamux DWDM System
  
  
• Industry's Largest 0.13-micron FPGA Now Production Qualified (Tuesday Jan. 21, 2003)
  Industry's Largest 0.13-micron FPGA Now Production Qualified
  
  
• Lattice Expands Programmable Solutions into Portable Market with Industry's Lowest Power CPLD Family (Monday Jan. 20, 2003)
  Lattice Expands Programmable Solutions into Portable Market with Industry's Lowest Power CPLD Family
  
  
• Lattice Semiconductor Launches First Mixed-Signal PLDs Opening Power Management Market (Monday Jan. 20, 2003)
  Lattice Semiconductor Launches First Mixed-Signal PLDs Opening Power Management Market