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IP / SOC Products News
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Weebit Nano ReRAM IP now available in SkyWater Technology's S130 process (Tuesday Mar. 07, 2023)
Weebit Nano Limited (ASX:WBT), a leading developer of advanced memory technologies for the global semiconductor industry, and SkyWater Technology (NASDAQ: SKYT), the trusted technology realization partner, announce availability of Weebit’s resistive RAM (ReRAM) IP in SkyWater’s 130nm CMOS (S130) process.
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OPENEDGES Announces LPDDR5X/5/4x/4 PHY Tapeout at 7nm process node (Monday Mar. 06, 2023)
OPENEDGES today unveiled the tape out of the world’s first 7nm LPDDR PHY IP supporting LPDDR5x/5/4x/4 standards with a maximum data rate of 8533Mbps, providing more detailed information about the tape out.
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New controller IP core for secure data (Monday Mar. 06, 2023)
Increasing system attacks and cybercrime make it necessary to secure data in new ways. For this purpose, the Fraunhofer Institute for Photonic Microsystems IPMS developed the MACsec Controller IP-Core, which implements the latest Ethernet security standards. It provides authentication, integrity and encryption of data between different nodes of a Local Area Network (LAN).
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BrainChip Introduces Second-Generation Akida Platform (Monday Mar. 06, 2023)
This hyper-efficient yet powerful neural processing system, architected for embedded Edge AI applications, now adds efficient 8-bit processing to go with advanced capabilities such as time domain convolutions and vision transformer acceleration, for an unprecedented level of performance in sub-watt devices, taking them from perception towards cognition.
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CAST Enhances RISC-V Processor Line for Low-Power and Functional Safety Applications (Friday Mar. 03, 2023)
Semiconductor intellectual property provider CAST today announced the immediate availability of a new deeply embedded, low-power RISC-V processor IP core and enhancements to its functional safety RISC-V processor IP core.
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Safety element for automobiles, production or health can be implemented on the own microcontroller chip: RISC-V processor AIRISC-SAFETY from Fraunhofer Institute for Microelectronic Circuits and Systems IMS (Thursday Mar. 02, 2023)
The Fraunhofer IMS welcomes a new member to its RISC-V processor product family AIRISC - the AIRISC-SAFETY. The AIRISC-SAFETY has been successfully certified as »ASIL-D ready« (automotive safety integrity level) by TÜV SGS according to ISO 26262 and is now ready for the market.
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Floadia Completes eFlash IP Qualification on TSMC 130BCD plus Process and Achieves the World's Highest Data Retention for 10 Years at 200°C (Thursday Mar. 02, 2023)
Floadia has completed qualification of its eFlash IP, G1, on 130BCD Plus process of TSMC, the world's largest semiconductor foundry. G1 passed the qualification criteria of data retention for 10 years at 125°C after 10,000 program and erase operations.
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Agile Analog announces first customisable, process agnostic, 12-bit ADC IP (Tuesday Feb. 28, 2023)
Agile Analog, the analog IP innovators, has extended its range of data conversion IP with the introduction of the first customisable, process agnostic, 12-bit Analog to Digital Converter (ADC).
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Secure-IC & Trasna are introducing a revolutionary PUF solution that eliminates the need of enrollment phase (Thursday Feb. 23, 2023)
Secure-IC, the rising leader and unique global provider of end-to-end cybersecurity solutions for embedded systems and connected objects, and Trasna, an IoT secure hardware and software specialist, announce today they have succeeded to offer a groundbreaking Physically Unclonable Function (PUF) solution.
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CEVA Announces its Most Powerful and Efficient DSP Architecture to Date, Addressing the Massive Compute Requirements of 5G-Advanced and Beyond (Thursday Feb. 23, 2023)
Extending the company’s leadership in DSPs, the new CEVA-XC20 is based on a groundbreaking vector multi-threaded massive compute technology that is designed to address next-generation 5G-Advanced workloads across a broad spectrum of use cases.
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Arteris Unveils Next-Generation FlexNoC 5 Physically Aware Network-on-Chip IP (Wednesday Feb. 22, 2023)
Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced the launch of Arteris FlexNoC 5 physically aware network-on-chip (NoC) interconnect IP.
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Accurate Positioning Systems and Proximity Solutions with CoreHW Bluetooth® AoA and AoD Antenna Modules (Friday Feb. 17, 2023)
The Bluetooth-based indoor positioning solutions are becoming more popular technology due to their cost efficiency, low positioning errors, few necessary equipment, and a broad range of applications. In the following, we will introduce CoreHW’s Bluetooth® antenna modules, which are the main components of Bluetooth® direction finding and indoor positioning technology.
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The Six Semiconductor of OPENEDGES Technology Collaborates with imec.IC-link US to Tape-out Two 7nm Testchip (Thursday Feb. 16, 2023)
The Six Semiconductor, Inc. (TSS), a subsidiary of OPENEDGES Technology, Inc and a leading supplier of cutting-edge high-speed memory PHYs in multiple standards, technologies, and foundries, announced today that it has successfully taped out two memory sub-system validation testchips at the same time in a 7nm process.
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DVB-RCS2 Turbo Decoder and Encoder IP Core Available For Integration From Global IP Core (Monday Feb. 06, 2023)
Global IP Core Sales - The new DVB-RCS2 Turbo Encoder and Decoder IP Core is on the transmitter side, the turbo-phi encoder architecture is based on a parallel concatenation of two double-binary Recursive Systematic Convolutional (RSC) encoders, fed by blocks of K bits (N=K/2).
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BrainChip Tapes Out AKD1500 Chip in GlobalFoundries 22nm FD SOI Process (Monday Jan. 30, 2023)
BrainChip, the world’s first commercial producer of ultra-low power, fully digital, event-based, neuromorphic AI IP, today announced that it has achieved tape out of its AKD1500 reference design on GlobalFoundries’ 22nm fully depleted silicon-on-insulator (FD-SOI) technology.
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Xiphera announces the first IP core for the quantum-secure xQlave™ product family (Monday Jan. 23, 2023)
Xiphera introduces XIP6110B, the first member of the xQlave™ product family of quantum-secure cryptographic IP cores. XIP6110B implements CRYSTALS-Kyber Key Encapsulation Mechanism (KEM) that was recently selected as one of the four PQC algorithms to be standardised by the American NIST (National Institute of Standards and Technology).
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Certus Semiconductor releases ESD library in GlobalFoundries 12nm Finfet process (Friday Jan. 13, 2023)
Certus is pleased to announce the release of our ESD library in GlobalFoundries 12nm Finfet process. It offers a wide range of generic voltage solutions: 0.8V, 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V for power domains and I/Os.
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Creonic DVB-GSE Encapsulator and Decapsulator IP Cores Are Now Available with Data Rates of up to 4Gbit/s (Thursday Jan. 12, 2023)
Creonic GmbH today announced the performance optimization of its field-proven DVB-GSE Encapsulator and Decapsulator IP Cores. They close the gap between network protocols like Ethernet and the physical layer of DVB-Standards.
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Imagination's IMG DXT GPU unlocks scalable, premium ray tracing for all mobile gamers (Wednesday Jan. 11, 2023)
Imagination Technologies launches IMG DXT, a groundbreaking ray tracing GPU that scales to unlock cutting-edge graphics for all mobile device users.
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Digital Blocks AMBA Peripherals I3C, I2C, eSPI, xSPI Controller IP Core Families Extend Leadership with enhancements containing feature-rich, system-level integration features. (Monday Jan. 09, 2023)
Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces updates to I3C, I2C, eSPI, xSPI Controller Verilog IP Core family offerings.
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CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core (Monday Jan. 09, 2023)
The new CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain high throughput, two different levels of parallelism are carried out; 128 check nodes and 6 variable nodes which are processed at the same time.
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Cadence Tensilica HiFi DSP Enables Highly Energy-Efficient Audio Playback for Dolby Atmos for Cars (Friday Jan. 06, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence® Tensilica® HiFi DSP IP now supports Dolby Atmos® for cars, making it the first DSP IP with this capability. Cadence has optimized Dolby car experience technology to run on the Tensilica HiFi DSP for audio playback of Dolby Atmos for cars.
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Weebit Nano tapes-out first 22nm demo chip (Tuesday Jan. 03, 2023)
Weebit Nano Limited has taped-out (released to manufacturing) demonstration chips integrating its embedded Resistive Random-Access Memory (ReRAM) module in an advanced 22nm FD-SOI (fully depleted silicon on insulator) process technology.
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Digital Blocks DMA Controller Verilog IP Core Family Extends Leadership with enhancements to AXI4 Memory Map and Streaming Interfaces (Monday Jan. 02, 2023)
Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces enhancements to DMA Controller Verilog IP Core offerings with capabilities to stream data to and from memory such as between Network Interfaces and System Memory.
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Cadence Announces Industry Best-In-Class 8533Mbps LPDDR5X IP Solution for Next-Generation AI, Automotive and Mobile Applications (Monday Dec. 26, 2022)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the first LPDDR5X memory interface IP design optimized to operate at 8533Mbps—up to 33% faster than the previous generation of LPDDR IP.
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BSC develops four open-source hardware components based on RISC-V, contributing to open, reliable and high-performance safety-critical systems for industry (Thursday Dec. 22, 2022)
BSC expertise has led to the development of the open-source modules SafeSU, SafeDE, SafeDM, SafeTI that support verification and validation (V&V) processes and safety measure deployment to guarantee that the project’s safety goals are met. They have already been integrated with Advanced Microcontroller Bus Architecture (AMBA) protocols such as AMBA Advanced High-performance Bus (AHB) and AMBA Advanced eXtensible Interface 4 (AXI4).
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IPrium releases 100 Gbps Polar Encoder and Decoder (Thursday Dec. 22, 2022)
FPGA intellectual property (IP) provider IPrium LLC (www.iprium.com) has today announced that it has expanded its family of multigigabit FEC Encoder and Decoder IP products with a new 100 Gbit/s Polar FEC.
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DDMA, multi-channel DMA Controller IP core from DCD-SEMI (Thursday Dec. 15, 2022)
The DDMA is a four-channel Direct Memory Access Controller, with purpose to transfer data between memories and peripherals – to significantly reduce CPU utilization during data transfers. It can be programmed by any CPU via a 32-bit or 8-bit native interface.
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Latest aiWare4+ automotive NPU brings enhanced programmability, flexibility and scalability while retaining highest efficiency (Wednesday Dec. 14, 2022)
aiMotive, one of the world’s leading suppliers of scalable modular automated driving technologies, today announced the latest release of its award-winning aiWare automotive NPU hardware IP. aiWare4+ builds on the success of aiWare4 in production automotive SoCs, such as Nextchip’s Apache5 and Apach6, by refining the hardware architecture and significantly upgrading the software SDK.
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LeWiz released RISC-V with OmniXtend clustering technology to open source. (Tuesday Dec. 13, 2022)
OmniXtend is an open source architecture for clustering of processors (or servers) to remote storage and memory systems on the network. It allows processors such as RISC-V CPU(s) to execute programs stored remotely on network based storage or memory systems.



