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IP / SOC Products News

• ARM and Synopsys Announce Industry-First and Recommended Flow For ARM11 Family With Intelligent Energy Manager Technology (Monday Feb. 28, 2005)
  ARM and Synopsys Announce Industry-First and Recommended Flow For ARM11 Family With Intelligent Energy Manager Technology
  
  
• Free Sparc processor developer goes "commercial" (Thursday Feb. 24, 2005)
  Free Sparc processor developer goes "commercial"
  
  
• JMicron Develops Serial ATA II (3.0 Gbps) PHY Core on UMC's 0.13 Micron Process (Thursday Feb. 24, 2005)
  JMicron Develops Serial ATA II (3.0 Gbps) PHY Core on UMC's 0.13 Micron Process
  
  
• Innovative Semiconductors introduces smallest area, lowest power USB 2.0 PHY core for portable consumer electronics (Thursday Feb. 24, 2005)
  Innovative Semiconductors introduces smallest area, lowest power USB 2.0 PHY core for portable consumer electronics
  
  
• Temento Systems announces the release of DiaLite Platform Edition introducing PSL On Chip Verification (OCV) (Wednesday Feb. 23, 2005)
  Temento Systems announces the release of DiaLite Platform Edition introducing PSL On Chip Verification (OCV)
  
  
• Imagination Technologies Announces Latest Member of the META Family of Super-Threaded Processors (Tuesday Feb. 22, 2005)
  Imagination Technologies Announces Latest Member of the META Family of Super-Threaded Processors
  
  
• Cadre Codesign Inc. delivers high performance JPEG compression for FPGA-based intelligent cameras (Wednesday Feb. 16, 2005)
  Cadre Codesign Inc. delivers high performance JPEG compression for FPGA-based intelligent cameras
  
  
• NewLogic Launches WiLD-Mobile IP Enabling Low Cost WLAN Integration into Mobile Products (Wednesday Feb. 16, 2005)
  NewLogic Launches WiLD-Mobile IP Enabling Low Cost WLAN Integration into Mobile Products
  
  
• Virtual Silicon Announces Industry's First Delta-Sigma Fractional-N PLL Digital Frequency Synthesizer for Generic CMOS (Tuesday Feb. 15, 2005)
  Virtual Silicon Announces Industry's First Delta-Sigma Fractional-N PLL Digital Frequency Synthesizer for Generic CMOS
  
  
• TTPCom brings television to the mobile with low-power DVB-H Technology (Monday Feb. 14, 2005)
  TTPCom brings television to the mobile with low-power DVB-H Technology
  
  
• ARC International Announces New Roadmap of Pre-Optimized Configurable Processor Cores (Monday Feb. 14, 2005)
  ARC International Announces New Roadmap of Pre-Optimized Configurable Processor Cores
  
  
• Imagination Technologies Debuts PowerVR MVED1 Multi-Standard Video Encode/Decode Accelerator (Monday Feb. 14, 2005)
  Imagination Technologies Debuts PowerVR MVED1 Multi-Standard Video Encode/Decode Accelerator
  
  
• Imagination Technologies Debuts PowerVR MVDA2 Multi-Standard Video Decode Accelerator (Monday Feb. 14, 2005)
  Imagination Technologies Debuts PowerVR MVDA2 Multi-Standard Video Decode Accelerator
  
  
• ARC populates 600, 700 roadmaps with exemplar cores (Thursday Feb. 10, 2005)
  ARC populates 600, 700 roadmaps with exemplar cores
  
  
• HiTech Global Distribution expands IP Portfolio with USB 2.0 Cores (Thursday Feb. 10, 2005)
  HiTech Global Distribution expands IP Portfolio with USB 2.0 Cores
  
  
• Hantro to unveil H.264/AVC hardware decoder at 3GSM World Congress (Wednesday Feb. 09, 2005)
  Hantro to unveil H.264/AVC hardware decoder at 3GSM World Congress
  
  
• STMicro debuts RISC-based configurable SoC (Monday Feb. 07, 2005)
  STMicro debuts RISC-based configurable SoC
  
  
• Impinj Announces Availability of AEFuse Memory – World's First Multi-Time Programmable Fuse in Standard Logic CMOS (Monday Feb. 07, 2005)
  Impinj Announces Availability of AEFuse Memory – World's First Multi-Time Programmable Fuse in Standard Logic CMOS
  
  
• Synopsys Reduces Area and Power With Lowest Gate Count, Modular Hi-Speed USB On-The-Go Core (Monday Feb. 07, 2005)
  Synopsys Reduces Area and Power With Lowest Gate Count, Modular Hi-Speed USB On-The-Go Core
  
  
• Athena introduces world's fastest video cross correlator (Monday Feb. 07, 2005)
  Athena introduces world's fastest video cross correlator
  
  
• M2000 Intros Largest 90nm eFPGA (Monday Feb. 07, 2005)
  M2000 Intros Largest 90nm eFPGA
  
  
• Arithmatica Develops Integrated Flow with Cadence Encounter RTL Compiler to Accelerate Design and Verification of Math-Critical Chip (Thursday Feb. 03, 2005)
  Arithmatica Develops Integrated Flow with Cadence Encounter RTL Compiler to Accelerate Design and Verification of Math-Critical Chip
  
  
• Chipidea announces the USB-IF certification of a USB High Speed PHY in TSMC 90nm (Wednesday Feb. 02, 2005)
  Chipidea announces the USB-IF certification of a USB High Speed PHY in TSMC 90nm
  
  
• Kilopass to Provide Tower Semiconductor Silicon-Proven Field-Programmable Non-Volatile Memory for 0.18-Micron CMOS Process (Tuesday Feb. 01, 2005)
  Kilopass to Provide Tower Semiconductor Silicon-Proven Field-Programmable Non-Volatile Memory for 0.18-Micron CMOS Process
  
  
• Falanx' Single 2D/3D Graphics and Video Core Lowers Cost for Mobile Multimedia SoC Design (Tuesday Feb. 01, 2005)
  Falanx' Single 2D/3D Graphics and Video Core Lowers Cost for Mobile Multimedia SoC Design
  
  
• CAST Introduces the First Lossless JPEG (LJPEG) IP Cores (Monday Jan. 31, 2005)
  CAST Introduces the First Lossless JPEG (LJPEG) IP Cores
  
  
• LSI Logic Offers Industry's Fastest 440 MHz Synthesized MIPS32(R) 24Kf(TM) Processor Core With Reference Design (Monday Jan. 31, 2005)
  LSI Logic Offers Industry's Fastest 440 MHz Synthesized MIPS32(R) 24Kf(TM) Processor Core With Reference Design
  
  
• SOI embedded DRAM running on Freescale 90-nm process (Thursday Jan. 27, 2005)
  SOI embedded DRAM running on Freescale 90-nm process
  
  
• SafeNet Announces Version 2.0 of SafeZone IP (Thursday Jan. 27, 2005)
  SafeNet Announces Version 2.0 of SafeZone IP
  
  
• ARM begins work on "Serval-E" processor core (Wednesday Jan. 26, 2005)
  ARM begins work on "Serval-E" processor core