D&R Headline News | Most Popular | SoC News Alerts | |

IP / SOC Products News

• IPrium releases 32-channel J.83B Modulator (Thursday Jul. 01, 2021)
  FPGA intellectual property (IP) provider IPrium LLC has today announced that it has expanded its family of DTV Modulator IP products with a new 32-channel J.83B Modulator IP Core for MAX5861/MAX5862 DAC.
  
  
• System Level Solutions's USB 2.0 Device Controller IP core is now available for Lattice Semiconductor FPGA platform (Wednesday Jun. 30, 2021)
  System Level Solutions is serving USB IP core solutions for Intel and Microsemi FPGA platform since 16 years. From good response of customers globally as well as looking at market requirement, SLS USB 2.0 Device Controller IP core is now available to Lattice Semiconductor FPGA platform.
  
  
• Faraday Announces LPDDR4/4X in Samsung 14LPC Process (Tuesday Jun. 29, 2021)
  Faraday Technology, a leading ASIC design service and IP provider, today announced its LPDDR4 and LPDDR4X combo PHY IP up to 4.2Gbps is now available in Samsung’s 14nm LPC process.
  
  
• Quantum-tunnelling semiconductor IP verified as secure against all known IoT attacks (Tuesday Jun. 29, 2021)
  Crypto Quantique, a specialist in quantum-driven cybersecurity for the internet of things (IoT), has announced independent verification that its CMOS semiconductor IP for second-generation, physically unclonable functions (PUFs) is immune to side-channel attacks when used to create unique, immutable and unforgeable fingerprints for CMOS chips.
  
  
• Weebit Nano successfully demonstrates integration of selector with ReRAM cell for the stand-alone memory market (Friday Jun. 25, 2021)
  Weebit Nano Limited (ASX:WBT), a leading developer of next-generation semiconductor memory technologies, is pleased to announce it has created the industry’s first commercial integration of an oxide-based ReRAM (OxRAM) cell with an ovonic threshold switching (OTS) selector, a critical step in the company’s commercialisation path for the discrete (stand-alone) memory market.
  
  
• CEVA Expands Its Market-Leading Wireless Connectivity Portfolio with New Ultra-Wideband Platform IP (Thursday Jun. 24, 2021)
  CEVA today unveiled RivieraWaves™ UWB, an extremely power-efficient ultra-wideband (UWB) turnkey MAC and PHY platform intellectual property (IP) compliant with the IEEE 802.15.4z standard and in accordance with the FiRa consortium specifications.
  
  
• SiFive Performance P550 Core Sets New Standard as Highest Performance RISC-V Processor IP (Tuesday Jun. 22, 2021)
  The SiFive Performance family debuts with two new processor cores, the P270, SiFive’s first Linux capable processor with full support for the RISC-V vector extension v1.0 rc, and the SiFive Performance P550 core, SiFive’s highest performance processor to date.
  
  
• Codasip Announces A71X RISC-V Application Core with Dual-Issue Capability (Tuesday Jun. 22, 2021)
  Codasip, the leading supplier of customizable RISC-V® processor IP, today announces a new major version of its most advanced processor IP core: the A71X™ with dual-issue support for enhanced performance.
  
  
• Intrinsic ID QuiddiKey Hardware IP is Now CAVP Certified by NIST (Tuesday Jun. 22, 2021)
  Intrinsic ID, the world’s leading provider of Physical Unclonable Function (PUF) security IP for embedded systems, today announced that its flagship hardware IP product QuiddiKey has been certified by the National Institute of Standards and Technology (NIST).
  
  
• New Cadence Tensilica FloatingPoint DSP Family Delivers Scalable Performance for a Broad Range of Compute-Intensive Applications (Friday Jun. 18, 2021)
  Low-energy DSP IP optimizes power, performance and area, offering up to 40% area savings for mobile, automotive, consumer and hyperscale computing markets
  
  
• Silicon IP Provider Chips&Media Launches AV1 Video Encoder Hardware IP for 4K/UHD Video Resolutions and Beyond (Thursday Jun. 17, 2021)
  Chips&Media today unveiled AV1 supported video encoder hardware IP WAVE627, from the newly released next-generation video codec IP platform, WAVE6.
  
  
• Market-Optimized 3nm Physical IP for Armv9-based CPUs (Thursday Jun. 17, 2021)
  Arm partners are executing on plans for the future of computing today, and already leveraging the secure, powerful processing features of the new Armv9-A architecture to bring their innovations to life in next-generation SoCs. Market segments like premium mobile and hyperscale-cloud that require higher performance and power efficiency to process complex AI-based workloads are at the forefront of this development, and we are enabling their design with optimized physical IP and implementations, Arm POP IP, in TSMC 3nm technology.
  
  
• Rambus Advances New Era of Data Center Architecture with CXL Memory Interconnect Initiative (Wednesday Jun. 16, 2021)
  Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced the CXL Memory Interconnect Initiative to define and develop semiconductor solutions for advanced data center architectures that maximize performance, improve efficiency and reduce system cost. T
  
  
• Precise-ITC 800G_AX Ethernet IP Core Optimized for AI Application (Tuesday Jun. 15, 2021)
  Precise-ITC released the 800G_AX, an Ethernet IP core that is highly optimized for AI/Machine Learning applications. The IP core supports a single channel of 800GE or a combination of lower rates of 100GE, 200GE, and 400GE.
  
  
• Cortus Develops Next Generation High-End RISC-V CPU Core for HPC (Monday Jun. 14, 2021)
  Cortus S.A.S., a leader in custom Systems-on-Chip (SoC) design services and integrated circuit (IC) provider, today announced that it is developing the high-performance Out-of-Order (OoO) processor core which is at the heart of the European eProcessor project.
  
  
• DisplayPort (DP, eDP) v1.4 Transmitter & Receiver PHY & Controller IP Cores for advanced SOC supporting 8K resolutions! (Monday Jun. 14, 2021)
  T2M-IP are pleased to announce the immediate availability of its’ partners VESA-compliant DisplayPort v1.4 Transmitter & Receiver PHY and Controller IP Cores which are silicon proven in major Fabs and Nodes that can enable resolutions upto 8K
  
  
• Creonic to Offer End-to-end IP-over-Satellite Solutions (Thursday Jun. 10, 2021)
  Creonic today announced the launch of their new DVB-GSE Encapsulator and Decapsulator IP cores with immediate availability. Generic Stream Encapsulation (GSE) closes the gap between network protocols like IP or UDP and the physical layer of the DVB-S2/DVB-S2X standards.
  
  
• OPENEDGES and The Six Semi Announce Silicon Proven GDDR6 PHY in 12nm Process Technology (Wednesday Jun. 09, 2021)
  The Six Semiconductor Inc.(TSS), is pleased to announce the successful bring up of its 12nm GDDR6 PHY. TSS is wholly owned by OPENEDGES Technology, Inc. (OPENEDGES) and teamed up with OPENEDGES to integrate their advanced PHY technology together with OPENEDGES memory subsystem IP.
  
  
• Xylon Releases a Complete Multi-Channel HDR ISP IP Suite (Tuesday Jun. 08, 2021)
  The logicBRICKS HDR ISP IP Suite enables parallel processing of multiple Ultra HD video inputs in Xilinx programmable devices, ranging from the Artix-7 FPGAs to the latest Versal ACAP devices, while at the same time allowing for tremendous savings of up to 50 % of valuable programmable logic in comparison to simple instantiation of multiple ISP pipelines
  
  
• GUC Tapes Out AI/HPC/Networking Platform on TSMC CoWoS Technology Validating 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and 112G-LR SerDes IPs (Tuesday Jun. 08, 2021)
  Global Unichip Corp. (GUC), the Advanced ASIC Leader, announced today that it has successfully taped out AI/HPC/Networking CoWoS® Platform with 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and third-party 112G-LR SerDes IPs.
  
  
• Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP (Thursday Jun. 03, 2021)
  Synopsys, Inc. today announced its new DesignWare® Die-to-Die Controller IP, which complements the company's existing 112G USR/XSR PHY IP for a complete die-to-die IP solution. With the complete IP solution, designers benefit from a low-latency, high-bandwidth die-to-die connectivity offering that addresses the increased workload and faster data movement demands of high-performance computing, artificial intelligence (AI) and networking SoCs.
  
  
• Sondrel launches the fourth IP platform - SFA 350A - that delivers faster time to market for ADAS ASICs (Thursday Jun. 03, 2021)
  Bringing a new chip to the automotive market can be daunting due to the high safety standards required – ISO 26262. Sondrel has made this much easier for customers with the launch of its new, quad-channel, IP reference platform that has been architected with ISO26262 applications and the fast integration of customer IP in mind from the start.
  
  
• Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process (Thursday Jun. 03, 2021)
  Brite Semiconductor (“Brite”), a leading provider of custom ASIC design, manufacturing and IP, today announced the launch of ONFI (Open NAND Flash Interface) 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process.
  
  
• SmartDV Announces Support for ARINC Standards with Design and Verification IP (Thursday Jun. 03, 2021)
  SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today announced support of the ARINC standards with its Design and Verification IP.
  
  
• PLDA and AnalogX Announce Market-leading CXL 2.0 Solution featuring Ultra-low Latency and Power (Wednesday Jun. 02, 2021)
  PLDA and AnalogX today announced an optimized integration of PLDA CXL™ 2.0 controller and AnalogX 32G-MR PHY that reduces latency by 50% and power consumption by 40% compared to leading competitive solutions.
  
  
• PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform (Wednesday Jun. 02, 2021)
  PUFsecurity, a security solutions IP company, and Andes Technology (TWSE: 6533), a leading RISC-V CPU IP vendor, are the first to incorporate PUFsecurity’s PUFiot crypto coprocessor with Andes Technology’s D25F CPU and its associated platform AE350.
  
  
• EPI EPAC1.0 RISC-V Test Chip Taped-out (Tuesday Jun. 01, 2021)
  The European Processor Initiative (EPI), a project with 28 partners from 10 European countries, with the goal of helping the EU achieve independence in HPC chip technologies and HPC infrastructure, is proud to announce that we have successfully released our EPAC1.0 Test Chip for fabrication.
  
  
• Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology (Thursday May. 27, 2021)
  Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of its DesignWare® process, voltage and temperature (PVT) monitoring and sensing subsystem IP on TSMC's industry-leading N3 process technology.
  
  
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster (Thursday May. 27, 2021)
  Silex Insight, a leading provider for flexible security IP cores, announces the launch of the SM4-GCM Multi-booster, a high performance, small size symmetric cryptographic core, compliant to Chinese National Standard GBT.32907-2016.
  
  
• DCD-SEMI accelerates AES security with the latest IP Core (Thursday May. 27, 2021)
  DAES IP Core is a cryptographic co-processor which implements Rijndael encryption algorithm compliant with FIPS 197 Advanced Encryption Standard. Its implementation in hardware brings significant benefits in fields of security and performance over software one.