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IP / SOC Products News

• Synopsys Accelerates FIPS 140-3 Certification with NIST-Validated True Random Number Generator IP (Thursday Jun. 04, 2020)
  Synopsys, Inc. (Nasdaq: SNPS) today announced its DesignWare® True Random Number Generator (TRNG) IP has received validation by the National Institute of Standards and Technology (NIST) Cryptographic Algorithm Validation Program (CAVP), paving the way for the lower-risk Federal Information Processing Standards (FIPS) 140-3 certification of customer end products.
  
  
• Nolam Embedded Systems discloses the MIL-STD1553 solution integrated on REFLEX CES Arria 10 SoC Module (Thursday Jun. 04, 2020)
  Nolam Embedded Systems, provider of professional and full turnkey Computing and Embedded Systems, is pleased to announce the integration of its MIL-STD1553 solution, on the FPGA-based board of REFLEX CES, Achilles Arria® 10 SoC SoM.
  
  
• Synopsys Introduces Industry's First Complete USB4 IP Solution (Wednesday Jun. 03, 2020)
  Successful Tapeout of the DesignWare USB4 PHY Test Chip on 5nm Process Reduces Risk and Accelerates Time-to-Market for SoCs Supporting the 40 Gbps USB Specification
  
  
• Enyx launches an ultra-low latency development framework for building standardized, FPGA-based trading systems (Wednesday Jun. 03, 2020)
  Enyx, a leading developer of high performance trading solutions for the financial industry, today announced the launch of nxFramework, an FPGA-based development framework designed to reduce time-to-production when developing ultra-low latency trading systems.
  
  
• Codasip Extends SweRV Support Package to Include Western Digital SweRV EH2 & EL2 RISC-V Cores (Tuesday Jun. 02, 2020)
  Codasip announced today that the Codasip SweRV Support Package has been extended to include the open source, RISC-V-based SweRV Core™ EH2 and EL2 that were contributed to CHIPS Alliance by Western Digital. T
  
  
• UltraSoC enables ultra-high-speed closed-chassis analytics and debug over Synopsys USB3 (Tuesday Jun. 02, 2020)
  UltraSoC today announced a new USB solution which enables SoC and system development teams to access powerful system-level analytics, optimization and debug capabilities at speeds of 10Gbps – even in a closed chassis
  
  
• NEUCHIPS Announces World's First Deep Learning Recommendation Model (DLRM) Accelerator: RecAccel (Tuesday Jun. 02, 2020)
  Today, NEUCHIPS Corp., an AI compute company specializing in domain-specific accelerator solutions, announced the world's first recommendation engine - RecAccelTM - that can perform 500,000 inferences per second.
  
  
• Imagination announces next-generation IEEE 802.11ax/Wi-Fi 6 IP for low-power applications (Tuesday Jun. 02, 2020)
  Imagination Technologies announces the launch of IMG iEW400, its latest IP based on Imagination’s Ensigma Wi-Fi technology. iEW400 delivers integrated RF and baseband, designed for low-power and battery-powered applications such as the internet of things (IoT), wearables and hearables.
  
  
• Dolphin Design unveils SPIDER, a turnkey platform to accelerate the design of energy efficient power management systems (Monday Jun. 01, 2020)
  Leveraging their state-of-the-art IP portfolio and unique expertise in power network architecture, Dolphin Design has conceived SPIDER, a turnkey platform to accelerate the design of energy efficient power management systems.
  
  
• UltraSoC and Canis Labs partner to secure the CAN bus (Wednesday May. 27, 2020)
  UltraSoC and Canis Automotive Labs today announced a partnership that addresses one of the most serious cybersecurity vulnerabilities in the automotive industry: the lack of security features within the CAN bus, which is commonly used to interconnect in-vehicle systems such as brakes, steering, engine, airbags, door locks, and headlights.
  
  
• New Arm IP delivers true digital immersion for the 5G era (Tuesday May. 26, 2020)
  Arm's next-generation mobile solution delivers massive performance and efficiency gains to enable true digital immersion in the 5G era.
  
  
• Do more with less energy! What's behind Dolphin Design's Energy Efficient Platforms? (Monday May. 25, 2020)
  Dolphin Design, a leading provider in semiconductor IPs and design platforms, unveils their new System Platforms for Energy Efficient SoC Design – SPEED.
  
  
• eMemory Provides Intellectual Property for Secure NB-IoT Products (Thursday May. 21, 2020)
  eMemory, the world’s leading supplier of intellectual property for NVM and security at the semiconductor level, is providing its intellectual property that ensures security in new chips for the narrowband-IoT (NB-IoT) market.
  
  
• Imec combines advanced machine learning algorithms and innovations in chip design to achieve cm accuracy and low-power ultra wideband localization (Thursday May. 21, 2020)
  Imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, expands its secure proximity research program (for secure and very high accuracy ranging) with next-generation high-precision and low-power ultra wideband (UWB) technology.
  
  
• Microchip Reveals Software Development Kit and Neural Network IP for Easily Creating Low-Power FPGA Smart Embedded Vision Solutions (Tuesday May. 19, 2020)
  Through its Smart Embedded Vision initiative, Microchip Technology Inc. (Nasdaq: MCHP) is meeting the growing need for power-efficient inferencing in edge applications by making it easier for software developers to implement their algorithms in PolarFire® field-programmable gate arrays (FPGAs).
  
  
• Cadence Expands Design IP Portfolio with 56G Long-Reach PAM4 SerDes on TSMC N7 and N6 Processes (Monday May. 18, 2020)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of 56G long-reach SerDes IP on TSMC’s N7 and N6 process technologies. Hyperscale computing continues to be the main driver for very high-speed SerDes, and 112G/56G is a key enabler for cloud data center and optical networking applications.
  
  
• LeapMind Unveils "Efficiera", the New Ultra Low Power AI Inference Accelerator IP (Monday May. 18, 2020)
  LeapMind today announced that the company has developed "Efficiera", an ultra low power AI inference accelerator IP for targeting companies that design ASIC and FPGA circuits, and other related products.
  
  
• CHIP Alliance's Newly Enhanced SweRV Cores Available to All for Free (Thursday May. 14, 2020)
  CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced new enhancements to the SweRV Core™ EH2 and SweRV Core EL2, developed for the open-source community by Western Digital.
  
  
• CAST Releases 100Gbps UDP/IP Core (Thursday May. 14, 2020)
  CAST, Inc. today announced the availability of a new silicon intellectual property core enabling lean networking with the User Datagram Protocol (UDP) Internet Protocol (IP) at bidirectional speeds up to 100Gbps.
  
  
• SmartDV Ships First Design and Verification IP for MIPI RFFE v3.0 Specification (Tuesday May. 12, 2020)
  SmartDV™ Technologies is the first vendor to deliver Design and Verification intellectual property (IP) supporting the MIPI RF Front End Control Interface (MIPI RFFE) v3.0 specification, shipping it as the MIPI Alliance announced availability.
  
  
• Synopsys Accelerates High-Performance Computing SoC Designs with Industry's Broadest IP Portfolio for TSMC's 5nm Process Technology (Monday May. 11, 2020)
  Synopsys today announced the industry's broadest portfolio of high-quality IP on TSMC's 5nm process technology for high-performance computing system-on chips (SoCs).
  
  
• Dolphin Design Enables Next Generation Energy-Efficient Battery-Operated IoT Devices with New IP Platforms on TSMC 22ULL Process (Monday May. 11, 2020)
  Dolphin Design, a leader in semiconductor IPs and design platforms, today announced the development of a comprehensive set of semiconductor IPs on TSMC 22 nm ultra-low leakage (22ULL) process technology that will power the new generation of battery-operated IoT devices.
  
  
• Arasan Announces the Availability of MIPI D-PHY IP for TSMC 22nm Process Technology (Monday May. 11, 2020)
  Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automotive SoCs, today announced the immediate availability of its MIPI D-PHY IP supporting speeds of up to 2.5 Gbps on TSMC 22nm process technology for SoC designs.
  
  
• Silex Insight launches Public Key Engine supporting Chinese OSCCA SM9 (Thursday May. 07, 2020)
  Silex Insight, a leading provider for flexible security IP cores, announces today that their Public Key Engine (BA414EP) is also available with the Identity Based Cryptography (SM9) option, compliant to Chinese cryptographic standards.
  
  
• SmartDV's LPDDR5 IP Clocks 612 MHz in FPGA Functional Test, 1.6GHz at 28nm (Wednesday May. 06, 2020)
  SmartDV™ Technologies today confirmed its LPDDR5 SDRAM controller design intellectual property (IP) achieved a speed of over 600 megahertz (MHz) in a field programmable gate array (FPGA) functional test and 1.6 gigahertz (GHz) in a 28-nanometer design during a recent competitive evaluation.
  
  
• Faraday's SoCreative!V Platform Accelerates SoC Development in Edge Applications (Tuesday May. 05, 2020)
  Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced its SoCreative!V™ SoC development platform based upon Faraday's A500 SoC in UMC’s 28HPC process.
  
  
• Palma Ceia SemiDesign Tapes Out 802.11ax Transceiver for Wi-Fi 6 (Monday May. 04, 2020)
  Palma Ceia SemiDesign, a provider of next-generation wireless connectivity solutions, today announced it has completed an RF transceiver supporting 802.11ax, also known as Wi-Fi 6.
  
  
• PLDA Announce Complete Support for CXL and Gen-Z protocols (Monday May. 04, 2020)
  Following the recent Announcement of MoU between the CXL Consortium™ and the Gen-Z Consortium™, PLDA Launches their XpressLINK™ CXL IP, providing an immediate Compute Express Link solution for SoC developers.
  
  
• Dolphin Design unveils its innovative Energy Efficient Platforms, complete turnkey solutions for competitive SoC designs (Monday May. 04, 2020)
  Dolphin Design, a leading provider in semiconductor IPs and design platforms, unveils their new System Platforms for Energy Efficient SoC Design – SPEED – which enable competitive SoCs to be designed with outstanding energy efficiency figures.
  
  
• SmartDV Expands Line of Memory Controller Design IP, strengthening its Already Broad Portfolio of IP Products (Thursday Apr. 30, 2020)
  SmartDV™ Technologies, the Proven and Trusted choice for Design and Verification Intellectual Property (IP), today released a line of memory controller Design IP used for high-speed memories including HBM2/2E, HBM3, GDDR6 and LPDDR4/5.