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IP / SOC Products News

• NEO Semiconductor Reveals a Performance Boosting Floating Body Cell Mechanism for 3D X-DRAM during IEEE IMW 2024 (Monday May. 13, 2024)
  NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash and DRAM memory, today announced a performance boosting Floating Body Cell Mechanism for 3D X-DRAM.
  
  
• X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core (Thursday May. 09, 2024)
  The Open-Standard C-GPU solutions, offered as IP blocks and software, enable leading processor companies to develop low-power SoCs for Next Generation 3D Graphics, Compute, and AI/ML enabled wearables, AR/VR headsets, auto displays, edge and cloud processing, industrial systems, robotics, and other connected embedded/IoT devices.
  
  
• Arasan's Total MIPI Camera IP solution with CSI and C-PHY achieve ISO26262 Certification (Wednesday May. 08, 2024)
  Arasan announces the ISO26262 functional certification of its Total MIPI Camera IP Solution as a seamlessly integrated combination of its MIPI CSI-2 Tx / Rx and C-PHY IP
  
  
• sureCore announces successful tape-out of cryogenic IP demonstrator (Wednesday May. 08, 2024)
  SureCore, the ultra-low power embedded memory specialist, has announced the successful tape out of the next key part of the Innovate UK (IUK) - funded project “Development of CryoCMOS to Enable the Next Generation of Scalable Quantum Computers”.
  
  
• Zhuhai Chuangfeixin: OTP IP Based on 55nm High-Voltage Process Successfully Qualified for Listing (Monday May. 06, 2024)
  Zhuhai Chuangfeixin Technology Co., Ltd. (CFX), a leading provider of Non-Volatile Memory IP (NVM IP) in China, has recently announced the successful qualification of its OTP IP (One-Time Programmable memory IP core) based on the 55nm high-voltage (55HV 1.2V/6V/32V Process) process.
  
  
• BrainChip and Frontgrade Gaisler to Augment Space-Grade Microprocessors with AI Capabilities (Monday May. 06, 2024)
  BrainChip and Frontgrade Gaisler announce their collaboration to explore the integration of BrainChip’s AkidaTM neuromorphic processor into Frontgrade Gaisler’s next generation fault-tolerant, radiation-hardened microprocessors.
  
  
• oneNav announces the first L5-direct GNSS receiver technology (Monday May. 06, 2024)
  Global navigation satellite system (GNSS) technology developer oneNav announces the launch of L5-direct™, a new GNSS product category capable of directly acquiring and tracking L5-band signals.
  
  
• M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process (Thursday Apr. 25, 2024)
  M31 Technology Corporation (M31), a leading global provider of silicon intellectual property (IP), announced that the M31 MIPI C/D-PHY Combo IP has obtained silicon validation on the advanced TSMC 5nm process and the company has already started 3nm IP development.
  
  
• Rambus Advances AI 2.0 with GDDR7 Memory Controller IP (Tuesday Apr. 23, 2024)
  As the latest addition to the Rambus portfolio of industry-leading interface and security digital IP for AI 2.0, the GDDR7 memory controller will provide the breakthrough memory throughput required by servers and clients in the next wave of AI inference.
  
  
• Brisbane Silicon publishes DPTx 1.4 IP Core (Friday Apr. 19, 2024)
  Today we are very excited to announce that Brisbane Silicon will add a DPTx 1.4 IP core to its IP library suite.
  
  
• DVB-S2X Wideband LDPC/ BCH Decoder IP Core Available For Integration From Global IP Core (Friday Apr. 19, 2024)
  Global IP Core Sales - The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2X design for better performance and efficiency as well as robust service availability.
  
  
• M31 Successfully Validates 5nm IP Solution to Empower Global AI Applications (Thursday Apr. 18, 2024)
  M31 Technology, a leading global provider of silicon intellectual property (IP), announced that its 5nm advanced process IP solution for high-speed interface IPs such as MIPI C/D-PHY, and memory interface ONFI v5.1 I/O, have completed silicon validation.
  
  
• Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass-Produced (Wednesday Apr. 17, 2024)
  Zhuhai Chuangfeixin Technology Co., Ltd.(CFX), a leading one-stop NVMIP (Non-Volatile Memory IP) provider in China, recently announced that its OTP IP (One-Time Programmable memory IP core) for 90nm CMOS Image Sensor (CIS) process technology has successfully entered mass production at one of the top five global foundries.
  
  
• Movellus Extends Droop Management Leadership with Aeonic Generate™ AWM3 (Tuesday Apr. 16, 2024)
  Movellus today announced the expansion of its award-winning1 droop response solutions with the Aeonic Generate™ AWM3. This pioneering solution responds to voltage droops within 1-2 clock cycles while providing enhanced observability for droop profiling.
  
  
• OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance (Tuesday Apr. 16, 2024)
  This state-of-the-art inference neural processing unit (NPU) IP outperforms its previous generation, ENLIGHT (or ENLIGHT Classic), by fourfold, making it ideal solution for high-performance edge device including automotive, cameras, and more. ENLIGHT Pro is meticulously engineered to
  
  
• Creonic GmbH Introduces Fast Fourier Transform IP Core (Friday Apr. 12, 2024)
  Creonic GmbH, the leading provider of cutting-edge communications IP cores, proudly announces the release of its (inverse) Fast Fourier Transform (FFT/IFFT) IP core with Error Correction Code (ECC) memory support. Designed to meet the growing demand for efficient, error-tolerant signal processing solutions.
  
  
• Tiempo Secure - CryptoNext Security partnership, bringing High-End Post-Quantic IP Security innovation to the next level. (Wednesday Apr. 10, 2024)
  Leveraging their combined expertise in post-quantum software and secure hardware cryptography, they will accelerate the introduction of robust, innovative, and post-quantum resilient security solutions, from hardware to software applications, and communications protocols for system-on-chip providers.
  
  
• Arm Accelerates Edge AI with Latest Generation Ethos-U NPU and New IoT Reference Design Platform (Tuesday Apr. 09, 2024)
  Delivering a 4x performance uplift and 20% higher power efficiency compared to its predecessor while scaling from 128 to 2048 MAC units (4 TOPs @1GHz), the Ethos-U85 is addressing applications where we see even greater performance demands such as factory automation and commercial or smart home cameras.
  
  
• Xiphera Launches nQrux™ Family of Hardware Trust Engines for Hardware-Isolated Cryptographic Services and Computing Environments (Tuesday Apr. 09, 2024)
  The new nQrux™ portfolio offers highly optimised and customisable security solutions with cryptographic operations implemented purely in hardware.
  
  
• Ceva Launches Multi-Protocol Wireless Platform IP Family to Accelerate Enhanced Connectivity in MCUs and SOCs for IoT and Smart Edge AI Applications (Monday Apr. 08, 2024)
  Ceva-Waves™ Links™ IP Family delivers fully integrated multi-protocol connectivity solutions with Wi-Fi, Bluetooth, UWB, Thread, Zigbee, and Matter, simplifying development and accelerating time to market for next generation, connectivity-rich, MCUs and SoCs
  
  
• Imagination's new Catapult CPU is driving RISC-V device adoption (Monday Apr. 08, 2024)
  Imagination APXM-6200 CPU: The performance-dense RISC-V application processor for Intelligent, Consumer and Industrial Applications
  
  
• Semidynamics announces All-In-One AI IP for super powerful, next generation AI chips (Friday Apr. 05, 2024)
  Semidynamics, the European RISC-V custom core AI specialist, has announced its ‘All-In-One AI’ IP that is designed for super powerful, next generation AI chips and algorithms such as transformers.
  
  
• RED Semiconductor announces VISC™ licensable high performance processor architecture for RISC-V (Thursday Apr. 04, 2024)
  VISC is an accelerated RISC-V microprocessor core, which optimises complex mathematical algorithms for parallel execution in its reconfiguration hardware engine.
  
  
• sureCore announces low power memory compiler for 16nm FinFET (Thursday Apr. 04, 2024)
  sureCore, the low power embedded memory specialist, has announced the availability of its PowerMiser, ultra-low, dynamic power memory compiler in 16nm. This will enable developers to more easily hit their challenging power budgets and successfully exploit the capabilities of these mature FinFET processes.
  
  
• Think Silicon to Showcase its Latest Ultra-Low-Power 3D Graphics and AI in One IP Architecture at Embedded World 2024 (Wednesday Apr. 03, 2024)
  Think Silicon, the leading provider of ultra-low-power GPU and AI IP for embedded systems, will showcase its latest graphics and AI solutions for edge computing devices in Hall 4, Booth 476 at Embedded World 2024 taking place in Nuremberg, Germany from April 9-11.
  
  
• PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support (Thursday Mar. 28, 2024)
  PUFsecurity, the leading company in developing PUF-based security IP solutions, introduces its new Crypto Coprocessor member, PUFcc7. PUFcc7 features enhanced speed performance and upgraded crypto engines that fully support customers in meeting TLS 1.3 and FIPS 186-5 requirements.
  
  
• VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification (Thursday Mar. 28, 2024)
  VeriSilicon (688521.SH) today announced its complete Bluetooth Low Energy (BLE) IP solution has achieved full compliance with LE Audio specification, including certifications for the LE Audio protocol stack and Low Complexity Communications Codec (LC3).
  
  
• Achronix FPGAs Add Support for Bluespec's Linux-capable RISC-V Soft Processors to Enable Scalable Processing (Tuesday Mar. 26, 2024)
  Marking an industry first, Bluespec’s RISC-V processors now seamlessly integrate into the Achronix 2D network-on-chip (NoC) architecture, simplifying integration and enabling engineers to add scalable processing to their Achronix FPGA designs easily.
  
  
• Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024 (Monday Mar. 25, 2024)
  Alphawave Semi today announced its collaboration with InnoLight Technology, the leader in data center optics, to bring a low power, low latency linear pluggable optics (LPO) demonstration to OFC 2024.
  
  
• StarIC and GlobalFoundries announce strategic partnership, release high-Speed TIA and drivers to advance silicon photonics ecosystem (Monday Mar. 25, 2024)
  StarIC is pleased to announce a strategic collaboration with GlobalFoundries (GF) aimed at advancing silicon photonics innovation. This partnership brings forth a breakthrough library of high-speed silicon photonics foundational blocks, specifically tailored for the GF Fotonix™ 45SPCLO process.