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Smart IP Listing

641 IP Cores (1 - 40)

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Smallest GPU to support native HDR applications, suitable for wearable devices, smart home hubs, or mainstream set-top boxes

CXM GPUs have been finely tuned to deliver seamless user interfaces to cost-sensitive consumer devices. Each GPU in the series boasts a nearly 50% increase in performance density over the IMG ...

1
Efficient GPU ideal for integrating into smart home hubs, set-top boxes or mainstream DTVs

CXM GPUs have been finely tuned to deliver seamless user interfaces to cost-sensitive consumer devices. Each GPU in the series boasts a nearly 50% increase in performance density over the IMG ...

2
Smart Card Reader Controller Core

Implements an interface and controller for communicating between smart cards and host systems using a variety of standard system interfaces. The SCR supports the ISO/IEC 7816-3:2006 and EMV2000 ...

3
ISO 7816 Based Smart Card Reader

The DSMART is a fast, versatile and cost-competitive core intended for smart card reader applications. It provides a communication interface with a smart card, based on ISO 7816-3/EMV4.2 requirements. ...

1 Testimonial
Alex Chen, Project Leader of Business Project Department, Faraday Technology Corporation

4
Smart Grid PLC Baseband Processor

The ntG3_BBP is a fully compliant ITU-T G.9903 baseband modem that can be used in a wide range of smart grid applications over power lines, including smart metering and energy management in ...

5
MIPI SPMI Slave IP

MIPI SPMI Slave interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI specification. Through its SPMI companilitity, it provides a simple ...

6
MIPI RFFE Master IP

MIPI RFFE Master interface provides full support for the two-wire MIPI RFFE synchronous serial interface, compatible with RFFE specification. Through its RFFE compatibility, it provides a simple ...

7
BLE5.2 RFIP in TSMC 55nm~22nm

ACTT’s Bluetooth Low Energy 5.2 Radio IP available from 55nm~22nm logic process node. The radio supports 1Mbps, 2Mbps and Long Range mode, which is fully compliant with Bluetooth® Low Energy ...

8
BLE5.2 RFIP in SMIC 55nm~22nm

ACTT’s Bluetooth Low Energy 5.2 Radio IP available from 55nm~22nm logic process node. The radio supports 1Mbps, 2Mbps and Long Range mode, which is fully compliant with Bluetooth® Low Energy ...

9
Universal Asynchronous Receiver / Transmitter

CoreUART is a serial communication controller with a flexible serial data interface that is intended primarily for embedded systems. CoreUART can be used to interface directly to industry standard ...

10
High-Performance Single Data Rate SDRAM Controller

Description: CORESDR provides a high performance interface to single data rate(SDR) synchronous dynamic random access memory(SDRAM) devices. CORESDR accepts read and write commands using ...

11
MIL-STD-1553B Remote Terminal

MIL-STD-1553B is a 1 Mb/s command/response, dual-redundant, time-multiplexed serial data bus used in aircraft, spacecraft, military vehicles, and severe control environments. Core1553BRT provides ...

12
DES Encryption and Decryption

Description: CoreDES * Implements DES to NIST FIPS PUB 46-3 * Supports 56-bit key size * Fastest data rate is on Axcelerator at 500 Mbps * Encryption and decryption ...

13
AES Encryption and Decryption

The CoreAES128 macro implements the advanced encryption standard (AES), which provides a means of securing data. AES utilizes the Rijndael algorithm, which is described in detail in the Federal ...

14
3DES Encryption and Decryption

The Core3DES macro implements the Triple Data Encryption Standard (3DES or Triple DES), which provides a means of securing data. The Triple DES algorithm is described in the Federal Information ...

15
I2C Master/Slave Interface

CoreI2C provides an APB-driven serial interface, supporting I2C, SMBus, and PMBus data transfers. Several Verilog/VHDL parameters are available to minimize FPGA fabric area for a given application. ...

16
Universal Asynchronous Receiver / Transmitter

Description: Universal Asynchronous Receiver/Transmitter (UART) Core16550 is a UART with or without FIFO support used for asynchronous communication. It is 100% software compatible ...

17
Serial Peripheral Interface

CoreSPI implements SPI and can operate as either a Master or a Slave. When operating in Master mode, the core generates the serial data clock (m_sck) and selects the Slave device that will be ...

18
MIL-STD-1553A and B Bus Controller (BC)

MIL-STD-1553 is a command/response, dual-redundant, time-multiplexed serial data bus used in severe environments. Core1553BRM provides a complete, MIL-STD-1553A and B Bus Controller (BC), Remote ...

19
ARINC 429 Bus Interface

Core429 meets all requirements for ARINC 429 operation, which is a two-wire, point-to-point serial data bus used for control communications in Avionics. Core429 has 16 independent receive and ...

20
FFT Processor for Microsemi FPGA

Fast Fourier Transform (FFT) Filter Generator CoreFFT v6.4 makes use of multiply-accumulate blocks embedded on-chip in Microsemi's PolarFire, SmartFusion2, IGLOO2 and RTG4 FPGA devices to ...

21
Pulse Width Modulation core

CorePWM is a general purpose, multi-channel pulse width modulator (PWM) module for motor control, LED dimming, tone generation, battery charging, heating elements and much more. In General Purpose ...

22
8-bit ASM51 Compatible Controller

Core8051s is an ASM51-compatible microcontroller core that can run programs written for the 8051. It contains the main 8051 core logic but no peripheral logic. Core8051s has an APB bus interface ...

23
Simple Micro APB Bus Controller

CoreABC is a simple, low gate count controller for Advanced Microcontroller Bus Architecture (AMBA®) advanced peripheral bus (APB) based designs. In particular, it is targeted to control ...

24
General Purpose Input/Output

CoreGPIO is an APB bus peripheral that provides up to 32 inputs and 32 outputs for general purpose use. The core is intended for use with the Microsemi soft processors: Cortex-M1, Core8051s, ...

25
Configurable Interrupt Controller

CoreInterrupt is an APB Slave component that provides configurable interrupt processing. It supports 0 to 32 IRQ sources and 0 to 8 FIQ sources. The IRQ and FIQ source inputs are level-sensitive, ...

26
Programmable 32-bit Timer

CoreTimer is an APB slave that provides the functionality for an interrupt-generating, programmable decrementing counter. The core is typically used as part of a processor subsystem ...

27
Programmable 32-bit Watchdog Timer

CoreWatchdog is an APB slave that provides a means of recovering from software crashes. When enabled, the core will generate a soft reset if the microprocessor fails to refresh it on ...

28
AMBA AHB Bus Interface

CoreAHB is an AMBA bus interface that is used to connect subsystem cores to Microsemi's 32-bit soft processors. The bus interface is easy to use and fully compatible with the AHB protocol. ...

29
AMBA AHB to APB Bridge

CoreAHB2APB (AMBA Bridge) is an AHB slave that connects the AHB to the APB and acts as the master on the APB. Address decoding for the APB is carried out within CoreAHB2APB, providing select ...

30
AMBA AHB-Lite Bus Interface

CoreAHBLite is a multi-master implementation of the AHB-Lite bus interconnect (a subset of the AMBA advanced high-performance bus) used to connect subsystem cores to Microsemi's 32-bit ARM processors. ...

31
On-chip AHB SRAM Memory Controller

CoreAhbSram provides an AHB bus interface to the embedded SRAM memory blocks within Microsemi's Flash devices. In these devices, software running on an AHB-based microprocessor will be ...

32
AMBA APB Bus Interface

CoreAPB is an AMBA bus interface that is used to connect subsystem cores to Microsemi's soft processors. The bus interface is easy to use and fully compatible with the APB protocol. The core ...

33
AMBA APB 3.0 Bus Interface

CoreAPB3 is an AMBA bus interface that is used to connect subsystem cores to Microsemi's soft processors. The bus interface is easy to use and fully compatible with the APB v3.0 protocol. The ...

34
FROM Memory Access Controller

CoreFROM is an APB slave that provides a means to access the 128-byte FROM (FlashROM) memory available in Microsemi Supported Devices. The core is intended for use with the Microsemi soft processors: ...

35
External SRAM and Flash Memory Controller

CoreMemCtrl is an AHB Slave component that supports access to external SRAM and flash memory resources. CoreMemCtrl uses two Slave slots on the AHB Bus. The Memory Controller is ...

36
Processor Memory Aliasing

CoreRemap is an APB slave that is a small control block with a singlebit register that is intended for use in control aliasing of memory resources at the bottom of the processor address ...

37
Reed Solomon Encoder

CoreRSENC is an RTL generator that produces an Microsemi FPGA–optimized Reed-Solomon (RS) encoder core based on user-defined parameters. RS codes are a class of error-correcting codes used ...

38
AHB to APB Mailbox Interface

CoreMBX (Mail Box) allows data messages (mail) to pass back and forth from one processing element to another. The user is able to choose whether this message passing capability is implemented ...

39
Reed Solomon Decoder

CoreRSDEC is an RTL generator that produces an Microsemi FPGA–optimized Reed-Solomon (RS) decoder core based on user-defined parameters. RS codes are a class of error-correcting codes used ...

40

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