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MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E)
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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates Dual Port Register File instances using the GLOBALFOUNDRIES 22nm FDX-PLUS CMOS process.
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Dual port register file IP
- Cryogenic Dual Port Register File qualified down to 4K operating temperature
- Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
- Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
- Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k