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BT Dual Mode v6.0 RF PHY IP in TSMC 22nm with Channel sounding
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I2C Verification IP
The I2C Verification IP provides an effective & efficient way to verify the components interfacing with I2C interface of an ASIC/FPGA or SoC.
The I2C VIP is fully compliant with revision 03 of I2C specifications from Philips. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design time and the simulation time.
The I2C VIP is fully compliant with revision 03 of I2C specifications from Philips. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design time and the simulation time.
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Block Diagram of the I2C Verification IP Verification IP
