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130nm FTP Non Volatile Memory for Standard CMOS Logic Process
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JTAG DTM Verification IP
Truechip's JTAG DTM Verification IP provides an effective & efficient way to verify the components interfacing with RISC-V Debug Module. It is fully compliant with standard RISC-V Debug Specification 0.13.2 by SiFive, Inc. This VIP is a lightweight VIP with an easy plug-and-play interface so that there is no hit on the design cycle time.
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Block Diagram of the JTAG DTM Verification IP Verification IP
