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Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
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PIPE 4.3 compliant PHY Verification IP
azPHY 1.0 is a perfect solution to verify high speed interface serdes IPs that support the high speed standards e.g. PCIe, USB and SATA. This VIP consists of modular components viz. azPHY model, azMAC uvc and azPIPE interface analyzer. azPHY is a systemverilog based PIPE 4.3 compliant PHY model. azPIPE is a set of assertions to verify the correctness of the PIPE interface and azMAC is a UVC to mimic the controller behaviour.
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Block Diagram of the PIPE 4.3 compliant PHY Verification IP Verification IP
