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MIPI CSI2 rev 2.0 transmitter/controller for FPGA, with 8 lanes and 2.5Gbps per lane
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Platform Level Interrupt Controller Verification IP
Truechip's Platform Level Interrupt Controller Verification IP provides an effective & efficient way to verify the components interfacing with RISC-V Core. It is fully compliant with standard RISC-V Privilege Spec by SiFive, Inc. This VIP internally supports other controller configurations like, APIC, CLIC and CLINT.
This is a lightweight VIP with an easy plug-and-play interface so that there is no hit on the design cycle time
This is a lightweight VIP with an easy plug-and-play interface so that there is no hit on the design cycle time
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Block Diagram of the Platform Level Interrupt Controller Verification IP
