SPI/FRAM Verification IP

SPI/FRAM Verification IP provides an smart way to verify the serial synchronous communication protocol.The SmartDV s SPI/SPANSION_FLASH Verification IP is fully compliant with SPI Block Guide V04.01 of the FRAM s FM25L512 512Kb Memory Specification and provides the following features. It can work with Verilog HDL environment and works with all Verilog simulators that are support SystemVerilog.

• see the entire SPI/FRAM Verification IP datasheet
• get in contact with SPI/FRAM Verification IP Supplier