Paradigm Works Announces VMM 1.0 enhancements to its SystemVerilog FrameWorks VMM Template Generator software

Create VMM SystemVerilog Verification Environments with SystemVerilog FrameWorks™ VMM Template Generator. VMM 1.0 Support added. Available Free of Charge.

Andover, MA -- May 4, 2009 -- Paradigm Works, Inc., a world-class leader in ASIC and FPGA technology and development services, today announced VMM 1.0 enhancements to its SystemVerilog FrameWorks™ VMM Template Generator software. The VMM Template Generator takes user input parameters and automatically creates a functional framework for an VMM compliant verification environment. Today's release includes enhanced features such as:

Integration with VMM Open Source Library
User Defined Base Class Support
Runs on Both VCS and Questa
Best Practice VIP Structure for Easy Customization and Reuse
Testbench with Scoreboard Wrapper and Shutdown Manager Wrapper for Maximum Reusability
User Guide to Assist Customization of the Generated Testbench

Verification teams at all experience levels will find that this tool enables the rapid adoption, implementation and the consistent scaling of the VMM methodology across team and corporate boundaries. Teams with technical leadership concentrated in one or a few geographical locations will find the VMM Template Generator particularly useful for scaling their expertise and ensuring consistency across physically distinct sites and individuals with varying degrees of expertise.

The SystemVerilog FrameWorks™ VMM Template Generator is available for free! Click here to create your VMM environment!

Coming Soon!