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Commentary / Analysis
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AUDIO PROCESSING: IP cores upgraded to boost sound capability (Monday May. 23, 2005)
AUDIO PROCESSING: IP cores upgraded to boost sound capability
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Structured ASICs not just for small chip players (Monday May. 23, 2005)
When structured ASICs made their debut several years ago, they were supposed to offer some relief to smaller systems makers that were caught in the no man's land between standard-cell ASICs and FPGAs
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Formal approach offers verification 'salvation' (Monday May. 23, 2005)
Verification guru Harry Foster shows how a prove-as-you-go methodology, coupled with the mature use of assertion-based verification, can help rescue users from verification hell
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How to do business in China (Tuesday May. 17, 2005)
A good part of the first day of the IEE/FSA (Institute of Electrical Engineering/Fabless Semiconductor Association) International Executive Semiconductor Forum last week was taken up with how to do business in China.
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Low-power design goes mainstream (Monday May. 16, 2005)
Engineers can no longer expect to achieve power-efficient designs with a quick power calculation and a liberal dose of decoupling capacitors. Instead, they need to routinely apply sophisticated low-power design methods that can address the rising impact o
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Philips Semiconductor CTO outlines system-in-package challenges (Thursday May. 12, 2005)
The next step forward in integration has to address system-in-package (SIP) issues and needs EDA tools with broader scope and greater standardization of approach, according to Rene Penning de Vries, chief technology officer of Philips Semiconductors
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Interview: Roelandts, president and CEO of Xilinx discusses the shifting balance between FPGAs and ASICs, the role of FPGAs in consumer electronics and supply chain gains (Friday May. 06, 2005)
By Ed Sperling -- Electronic News, 5/6/2005
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ADI's data converter business reflects a mixture of standbys and custom brews (Monday May. 02, 2005)
Today's data converter applications reflect an entirely new mixture of specifications and part types, Analog Devices Inc. (Norwood, Mass.) told EE Times in private briefings here last week
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Platform SoCs now possible (Monday May. 02, 2005)
End markets are presenting a serious problem to traditional ASIC design. Especially in consumer applications, but increasingly in other areas as well, markets tend to be fast-moving and fragmented. The system-on-chip that is perfect for midrange portable
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FPGA Design Needs More Than a Face Lift (Wednesday Apr. 27, 2005)
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Rambus CEO eager to move beyond the courtroom -- Harold Hughes discusses his company's legal dramas and the development of the Cell processor (Wednesday Apr. 27, 2005)
Rambus CEO Harold Hughes hopes his company's name won't always remind the memory industry of black-robed judges and endless pages of court filings.
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OEMs to EDA world: Time to catch up (Monday Apr. 25, 2005)
OEMs to EDA world: Time to catch up
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IP assembly represents a sea change in the design of ASICs (Monday Apr. 25, 2005)
Time was when designing an ASIC meant generating RTL, from scratch, for every block in the design. As chip capacities grew larger, this approach became less efficient and, eventually, impractical. For several years now, the voice of orthodoxy has been say
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Cutting a fast path to semiconductors: With special synthesis and processing, algorithms turn into silicon-but keep an eye on hardware (Monday Apr. 18, 2005)
Cutting a fast path to semiconductors: With special synthesis and processing, algorithms turn into silicon-but keep an eye on hardware
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A matter of the design chain (Monday Apr. 18, 2005)
A matter of the design chain
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IP quality: design's tough nut (Monday Apr. 18, 2005)
IP quality: design's tough nut
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Foundries should drive IP quality (Monday Apr. 18, 2005)
Foundries should drive IP quality
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Memory problems: Consumer products need a new nonvolatile embedded option (Thursday Apr. 14, 2005)
Memory problems: Consumer products need a new nonvolatile embedded option
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Mentor VP highlights growing need for systems design reuse (Thursday Apr. 14, 2005)
Mentor VP highlights growing need for systems design reuse
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Mark Templeton, president of ARM Inc., advocates more dynamic collaborative design (Friday Apr. 08, 2005)
Mark Templeton, president of ARM Inc., advocates more dynamic collaborative design
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IBM VC calls for 'open' hardware (Friday Apr. 08, 2005)
IBM VC calls for 'open' hardware
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Cadence Executive Chairman Ray Bingham calls on China to respect intellectual property (Wednesday Apr. 06, 2005)
Cadence Executive Chairman Ray Bingham calls on China to respect intellectual property
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EDA development going in-house, analyst says (Tuesday Apr. 05, 2005)
EDA development going in-house, analyst says
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Wipro says interest in outsourcing is on the rise (Friday Apr. 01, 2005)
Wipro says interest in outsourcing is on the rise
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Brave New World -- lawyers may become more important than engineers (Thursday Mar. 31, 2005)
Brave New World -- lawyers may become more important than engineers
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IP Reuse Can Usher in a Renaissance (Wednesday Mar. 30, 2005)
The 2003 International Technology Roadmap for Semiconductors (ITRS) projects that 75 percent of design productivity improvement will come from IP reuse and 25 percent from improved EDA tools, flow, or methodologies
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Heavy rules hold back 90-nm yield (Monday Mar. 28, 2005)
Heavy rules hold back 90-nm yield
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Design at the System Level (Friday Mar. 25, 2005)
Design at the System Level
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Interview: Rambus' chairman looks to the future -- Geoff Tate discusses shortage of U.S. engineers, market opportunities and demand from chipmakers (Thursday Mar. 24, 2005)
Interview: Rambus' chairman looks to the future -- Geoff Tate discusses shortage of U.S. engineers, market opportunities and demand from chipmakers
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Limits of IP block strategy exposed (Monday Mar. 14, 2005)
The lesson of Barcelona Design Inc., the analog automation pioneer now disbanding, is that good technology and plenty of venture money won't save a company with an unclear business model and overly ambitious goals.






