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IP / SOC Products News
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CAST NAND Flash Controller Supports Latest High-Speed Memories and is Ready for ONFI 3 (Wednesday Nov. 16, 2011)
CAST is now shipping an improved, sixth-generation version of its successful NAND Flash Memory Controller IP core. The CAST NANDFLASH-CTRL Core gains support for the latest high-speed memory devices.
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NSCore's One-Time Programmable Memory Completes Qualification at TSMC 65nm and 0.18um Technologies (Wednesday Nov. 16, 2011)
NSCore announced today that its PermSRAM® embedded one-time program (OTP) NVM technology has passed qualification in both TSMC 65nm low power (LP) and 0.18um generic (G) technologies according to TSMC9000 requirements.
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Xilinx Announces Key Connectivity IP Cores for Next Generation LTE and LTE-A Wireless Infrastructure Equipment (Wednesday Nov. 16, 2011)
Xilinx today announced the availability of three key connectivity IP cores that are vital for building programmable, flexible and cost effective 3G+/4G wireless base stations. Xilinx's Serial RapidIO Gen 2 v1.2 Endpoint LogiCORE™ IP, JESD204 v1.1 LogiCORE IP , and CPRI v4.1 LogiCORE IP all support connectivity standards and will help developers address design challenges in building new wireless equipment with higher system capacities.
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CEVA-TeakLite-III DSP Offers First IP Core Approved for Dolby MS11 Multistream Decoder (Tuesday Nov. 15, 2011)
CEVA today announced that the CEVA-TeakLite-III DSP has become the industry's first IP core approved by Dolby for the MS11 Multistream Decoder - the latest Dolby® audio technology for enabling multi-format world-wide broadcast in home entertainment products.
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Best-in class switching regulators, from Dolphin Integration, reaching 90% efficiency (Friday Nov. 11, 2011)
Dolphin Integration unveil two new members of their panoply of embedded power-supply regulators. Both of these are switching regulators targeting applications requiring high conversion efficiency: more than 90% when the average current is above 10% of the maximum value.
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Mali-T658 GPU Extends Graphics And GPU Compute Leadership For High Performance Devices (Thursday Nov. 10, 2011)
ARM today announced the ARM® Mali™-T658 Graphics Processing Unit (GPU) - the latest member of the Midgard architecture-based GPU family targeting high performance devices, such as superphones, tablets and smart-TVs.
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Sibridge Technologies Strengthens Embedded Product Design Solutions Offerings (Wednesday Nov. 09, 2011)
Sibridge Technologies today announced strengthening of its embedded product design group capabilities by offering end-to-end product design solutions for wireless, networking and streaming media domains.
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DapTechnology Demonstrates 3.2 Gigabit IEEE1394b Firewire SOC Solution (Tuesday Nov. 08, 2011)
DapTechnology announced today that a prototype version of the world's first high speed 3.2 Gigabit 1394b Firewire SOC Solution will be demonstrated at Vision 2011 in Stuttgart Germany.
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Arasan Chip Systems Announces SD 4.0 Host Controller IP (Thursday Nov. 03, 2011)
Designed for 3.12Gbps-Half Duplex SD 4.0 Cards, Arasan SD Host Controller IP is Suitable for Next Generation Mobile Devices with 3D TV and HD Video Streaming Capability
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Posedge Inc. unveils its High Performance, Low Gate Count SD3.01/SDIO3.0/eMMC4.5 Host Controller IP (Thursday Nov. 03, 2011)
The Posedge SD3.01/SDIO3.0/eMMC4.5 Host Controller is a highly configurable Host Controller compatible with Standard SD Host 3.0, SD Physical Layer 3.01, SDIO3.0 and JEDEC eMMC4.5 Specification. The core provides HS200 mode and SDR104 support, there by ensuring High Speed interface timing mode of up to 200MB/s @200MHz Single Date Rate Bus, with 1.8V or 1.2V IOs. The Controller supports AHB/AXI Interface and works in PIO / DMA / ADMA Modes of operation to transmit and receive data.
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MOSAID Unveils Industry's Fastest Flash Memory Device (Wednesday Nov. 02, 2011)
MOSAID today announced that it is now sampling the industry's fastest NAND Flash memory semiconductor device. MOSAID's 256Gb HLNAND(tm)2 (HyperLink NAND) device operates at up to 800MB/s per channel, twice the speed of any other NAND Flash device now on the market.
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ARM Discloses Technical Details Of The Next Version Of The ARM Architecture (Friday Oct. 28, 2011)
ARM today disclosed technical details of its new ARMv8 architecture, the first ARM architecture to include a 64-bit instruction set. ARMv8 broadens the ARM architecture to embrace 64-bit processing and extends virtual addressing, building on the rich heritage of the 32-bit ARMv7 architecture upon which market leading cores such as the Cortex™-A9 and Cortex-A15 processors are built.
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Interoperability verified: CommAgility & Radiocomp MTI (Thursday Oct. 27, 2011)
CommAgility has demonstrated the interoperability of AMC-2C6670 card with MTI Remote Radio Head and Xilinx CPRI core. This means that the solution's suitability for next-generation wireless designs has been verified - and this is an important milestone i nthe development of next generation wireless designs.
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H.264/AVC Superior DCI 4K Support and 3D Full HD Video Processing Now in the Evatronix JPEG 2000 Encoder (Thursday Oct. 27, 2011)
Evatronix have announced the new generation of the JPEG 2000 encoder IP core. Thanks to its innovative multi-channel single-core architecture the controller is capable of seamless processing of DCI 4K or 3D Full HD quality images at the impressive rates of 24 (DCI 4K) or 50 (3D Full HD) frames per second.
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Synopsys' DesignWare Audio IP Achieves First-Pass Silicon Success in Leading 65-nm and 55-nm Process Technologies (Wednesday Oct. 26, 2011)
Synopsys today announced that its DesignWare® 96 dB Hi-Fi Audio IP has achieved first-pass silicon success in 65-nanometer (nm) and 55-nm process technologies for multiple foundries.
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Arasan Chip Systems Demonstrates Industry's First UFS 1.0 Link Layer IP and Hardware Development Platform (Friday Oct. 21, 2011)
Arasan demonstrated its UFS 1.0 compliant UniPro® on an FPGA, running full Gear 1 speed at 1.25Gbps on a Linux system
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ARM Unveils Its Most Energy Efficient Application Processor Ever; Redefines Traditional Power and Performance Relationship with big.LITTLE Processing (Wednesday Oct. 19, 2011)
The Cortex-A7 processor builds on the low-power leadership established by the Cortex-A8 processor that is at the heart of many of today's most popular smartphones. A single Cortex-A7 processor delivers 5x the energy-efficiency and is one fifth the size of the Cortex-A8 processor, while providing significantly greater performance.
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Arasan Chip Systems Announces Mixed Signal USB 2.0 PHY IP (Wednesday Oct. 19, 2011)
Arasan announced today the availability of its USB 2.0 PHY IP. The core was developed by Mentor Graphics Corporation and proven in silicon in the SMIC 130nm process. Arasan has licensed the complete core and associated technology from Mentor Graphics and Arasan will support and develop the technology using its own analog mixed signal design team.
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Intrinsic-ID launches Confidentio Security Processing Unit (SPU) for mobile applications (Tuesday Oct. 18, 2011)
Intrinsic-ID announces Confidentio, a securely integrated and optimized IP solution that combines Intrinsic-ID’s flagship product Quiddikey™ for secret key storage with a FIPS-197 compliant AES cryptographic IP core.
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Evatronix Enhances its NAND Flash Controller Compatibility with Toggle Mode Support (Tuesday Oct. 18, 2011)
Evatronix has announced today the new generation of the NAND Flash controller IP core. The sixth generation of the Evatronix NAND Flash Controller has been enhanced to support Toggle Mode DDR NAND Flash memories.
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ARM and TSMC Tape Out First 20nm ARM Cortex-A15 Multicore Processor (Tuesday Oct. 18, 2011)
ARM and TSMC today announced that they have taped out the first 20nm ARM® Cortex(TM)-A15 MPCore(TM) processor. The two companies completed the implementation from RTL to tape out in six months using TSMC's Open Innovation Platform® (OIP) 20nm design ecosystem.
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Xylon's 3D graphics accelerator IP core targets the Xilinx Zynq-7000 Extensible Processor Platform (EPP) family (Friday Oct. 14, 2011)
The new IP core from Xylon's logicBRICKS IP library enables designers to use industry standard graphics API and add 3D graphics to their Xilinx Zynq-7000 EPP designs
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MoSys Announces Bandwidth Engine Development Kits (Wednesday Oct. 12, 2011)
MoSys announces the availability of its Bandwidth Engine FPGA Companion Kit and Characterization Kit. The FPGA Companion Kit includes a MoSys Bandwidth Engine evaluation board with FCI AirMax VS® connectors, which allow for integration with standard FPGA 100G development kits.
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UMC and Synopsys Collaborate to Develop DesignWare IP for 28-nanometer Technology (Wednesday Oct. 12, 2011)
UMC and Synopsys today announced an expanded collaboration to develop DesignWare® IP for UMC’s 28-nanometer(nm) HLP Poly SiON process.
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Imec implements multi-mode digital TV receiver on reconfigurable processor with record area efficiency (Tuesday Oct. 11, 2011)
Imec developed a reconfigurable receiver for highly diversified digital video broadcasting standards (DVB-T, ISDB-T and ATSC). The receiver is realized using algorithm-architecture co-optimization of imec’s reconfigurable processor ADRES.
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Zero Latency for intoPIX FPGA-based JPEG2000 Encoder & Decoder IP-Cores (Tuesday Oct. 11, 2011)
intoPIX will demonstrate its new FGPA-based JPEG2000 ultra-low latency codec at the CCW Expo. Reaching an end-to-end latency lower than 10 milliseconds, the new FPGA IP-Cores address real-time communication and fast response interactive video applications where zero latency is crucial.
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Chips&Media to deliver CODA980, the latest video IP core with highest quality encoder (Monday Oct. 10, 2011)
Chips&Media announces that it now begins shipping its fully verified IP CODA980, delivering simultaneous full 1080p HD video encode/decode capabilities for interactive video recording and conferencing applications, to partners.
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Arasan Chip Systems Announces 1080p HD Display Support with MIPI DSI IP (Friday Oct. 07, 2011)
Arasan announced today that the company continues to push the limits of production ready MIPI DSI IPs through the introduction of 1080p High-Definition Display support on its popular DSI Host and Device IP’s.
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Silicon Infusion's HDRM-D2 Demodulator gets 256QAM Option (Thursday Oct. 06, 2011)
The Zaltys High Performance Enhanced Demodulator (HDRM-D2) now has the capability of demodulating 256QAM, further increasing the data rate that can be handled by this versatile core.
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Gennum's Snowbush IP Group Receives SATA-IO Certification Revision 3.0 at 6Gb/s (Thursday Oct. 06, 2011)
Gennum's Snowbush IP group announced that its PHY IP (operating at 6Gb/s) and Controller IP for Serial ATA (SATA), passed the series of tests necessary to obtain SATA-IO Compliance and place these IP blocks on the SATA-IO Integrators List.








