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IP / SOC Products News

• The art of embedding Non-Volatile Memories renewed by Dolphin Integration's Cache (Friday May. 20, 2011)
  Dolphin Integration launches I-Stratus-LP, the first Cache Controller with a unique architecture optimized for Low-Power. Associated with the company's Low-Power SRAM, this Cache Controller creates an “apparent NVM” with unmatched performances: up to 8 times less consuming and up to 3 times faster when compared to the sole NVM!
  
  
• Arasan Chip Systems Releases ONFI 3.0 NAND Flash Controllers (Friday May. 13, 2011)
  Arasan announced the availability of NAND Flash Controllers supporting the newest Open NAND Flash Interface (ONFI) 3.0 specification. The Arasan ONFI 3.0 compliant NAND Flash Controller IP Core is a full featured, easy to use, synthesizable design that is easily integrated into any SoC or FPGA development.
  
  
• Synopsys' DesignWare SATA 6Gb/s IP Solutions Receive SATA-IO Certification (Thursday May. 12, 2011)
  Synopsys today announced that its DesignWare® SATA IP solutions, including Host and Device Digital Controllers and mixed-signal PHY IP, have successfully passed the Serial ATA International Organization (SATA-IO) 6G certification.
  
  
• NAND Flash Memory Controller IP Core from CAST now Faster and Easier to Integrate (Wednesday May. 11, 2011)
  A recent new version of the NAND Flash Controller Core from semiconductor intellectual property (IP) provider CAST, Inc. now helps designers work with the latest advanced memory devices available. It does this by using faster error correction code, and by including better features for simplifying integration and improving performance in demanding SoC implementations.
  
  
• Digital Blocks Expands the DB9000 TFT LCD Controller IP Core Family with Support for the AMBA AXI4 Interconnect (Tuesday May. 10, 2011)
  Digital Blocks today announces the DB9000AXI4 TFT LCD Controller IP Core. The DB9000AXI4 IP Core extends Digital Blocks 3 years of experience with the AXI protocol, with the AXI4 QoS and long bursts lengths, supporting high resolution LCD panels.
  
  
• Dolphin Integration offers the highest performances for an audio CODEC of the Xenon family: up to 106 dB of SNR at 65 nm. (Monday May. 09, 2011)
  Dolphin Integration offers highest performances in its new generation of audio CODEC - Xenon family - for applications targeting high resolution: PC sound cards, Set top Box, Digital TV etc. Xenon offers 106 dB of SNR, like in the configuration shCOD106.HD50.
  
  
• Mikroprojekt Announces DVI/HDMI 1.4 Interfaces (Thursday May. 05, 2011)
  Mikroprojekt is proud to announce the development of interface IP for DVI and HDMI applications. The IQ Core family will be augmented by the IQ-HDMI-Rx and IQ-HDMI-Tx, supporting the encoding and decoding of standard DVI video signals, capable of encoding and decoding 1080p60 full HD signals. Additionally, the IP cores will support the encoding and decoding of HDMI 1.4a 3D formats, enabling the transmission and reception of stereoscopic video streams, as well as the handling of the HDMI audio/aux data.
  
  
• Synopsys' DesignWare SuperSpeed USB 3.0 xHCI Host Controller IP Receives USB-IF Certification (Thursday May. 05, 2011)
  Synopsys announced that its DesignWare® SuperSpeed USB 3.0 xHCI (Extensible Host Controller Interface) IP has successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification.
  
  
• Cosmic Circuits announces proven 65nm MIPI PHY IP for TSMC Technology, followed with 40nm, 85nm and 28nm developments (Thursday May. 05, 2011)
  Cosmic Circuits today announced their MIPI IP development roadmap in TSMC technology. As part of its arrangement with TSMC, Cosmic Circuits has silicon-proven MIPI D-PHY in TSMC 65nm and has been characterizing silicon of MIPI M-PHY in TSMC 40nm technology.
  
  
• New ARM Memory Interface Solution Delivers 90 Percent Utilization Efficiency (Wednesday May. 04, 2011)
  ARM today announced the release of their fourth generation memory interface solution, comprising the Dynamic Memory Controller (DMC-400) and an ARM Artisan® DDR PHY hard macro, targeting high performance, low latency SoC applications.
  
  
• Cortus, MagnaChip and Taegee Team Up to Create 32Bit ASMCU IP for Touch Screen Applications (Wednesday May. 04, 2011)
  Cortus S.A., MagnaChip Semiconductor Corporation and Taegee Company, Ltd., have collaborated to develop an advanced, low power, 32bit microprocessor based ASMCU (Application Specific Microcontroller) and associated IP for use in products such as tablet computers, smart phones, laptops and other widely-used touch screen applications.
  
  
• Adapteva Scalable IP to Transform Multicore Computing Landscape (Tuesday May. 03, 2011)
  Adapteva today announced its flagship Epiphany microprocessor architecture IP (intellectual property). The company’s technology is unprecedented in its ability to scale to thousands of parallel processors on a single chip, connected through a high-bandwidth on-chip network, with each processor capable of executing separate and independent programs.
  
  
• SingMai Electronics Offers Compact MPU free of charge to Altera users (Tuesday May. 03, 2011)
  SingMai Electronics is now offering its PT13 compact MPU IP core as a free download for users of Altera programmable logic devices.
  
  
• Lattice and Oregano Systems Announce Comprehensive Versions of the IEEE-1588 Timing Node System IP Core (Tuesday May. 03, 2011)
  Lattice Semiconductor and Oregano Systems - Design & Consulting Ltd. today announced the immediate availability of three comprehensive versions of the IEEE-1588 Timing Node System IP core for the LatticeECP3™ and LatticeECP2M™ FPGA families.
  
  
• Altera, MIPS Technologies and SLS Announce the MP32 Core, the First MIPS-Based, FPGA-Optimized Soft Core Processor (Monday May. 02, 2011)
  Altera, MIPS Technologies and System Level Solutions (SLS) Corporation today introduced a MIPS-Based™, FPGA-optimized soft processor for use on Altera's FPGA and ASIC devices.
  
  
• Evatronix Enhances its JPEG 2000 IP with DCI 2K 24p and Full HD 30p signal processing capability (Monday May. 02, 2011)
  Evatronix SA has announced today the next generation of its JPEG 2000 solution that achieves smooth image processing at much higher resolutions. The JPEG 2000 solution from Evatronix can now satisfy the requirements of demanding Digital Cinema Initiatives (DCI 2K) and Full High Definition TV (HDTV) applications by providing designers with 24p or 30p frame rate, respectively, as defined by these standards.
  
  
• RivieraWaves announces the world's first Bluetooth 3.0 qualified baseband IP (Monday May. 02, 2011)
  RivieraWaves announced today that it has successfully passed the Bluetooth Qualification with its Bluetooth 3.0 baseband Intellectual Property (IP).
  
  
• Lattice Announces 4 x 3.125Gbps SRIO Capability on the Mid-Range LatticeECP3 FPGA Family (Monday May. 02, 2011)
  Lattice Semiconductor today announced the availability of a 4 x 3.125Gbps version of the Serial RapidIO 2.1, Level 1 endpoint core utilizing the award winning LatticeECP3(TM) FPGA family. This is an extension of the previously announced SRIO v2.1 core that originally supported 1x and 2x up to 3.125Gbps and 4x up to 2.5Gbps.
  
  
• The SpRAM PLUTON is a breeze from Dolphin Integration cooling up to 100 times leakage beyond stand-by modes at 180 nm (Monday May. 02, 2011)
  The celebrated PLUTON eLC architecture for single port RAM used in millions of chips for low power and high density, at nominal and low voltage, is now offered with innovations dividing leakage up to 100 times at 180 nm!
  
  
• PLDA PCI Express 3.0 IP Successfully Simulated with Xilinx 7 Series GTX Transceivers (Friday Apr. 29, 2011)
  PLDA today announced the immediate availability of their PCI Express (PCIe) 3.0 FPGA IP with complete support for the Xilinx® 7 series FPGAs. The PLDA PCIe IP Core is ready for simulation targeting Xilinx® 7 series GTX transceivers at Gen3 speed.
  
  
• Moortec Deliver Analog IP at 40nm and 28nm (Friday Apr. 29, 2011)
  Moortec Semiconductor announces the delivery of its embedded temperature sensor and crystal oscillator IP for TSMC's 40nm and 28nm processes.
  
  
• Xylon announces new Compact Multilayer Video Controller IP version with the AMBA AXI4 interface and the DVI output (Thursday Apr. 28, 2011)
  The new Compact Multilayer Video Controller IP version supports the AMBA® AXI4 (Advanced eXtensible Interface 4) interface which allows for IP use in the latest Xilinx ISE® Design Suite 13 software and design tools.
  
  
• PLDA and Aldec Announce PCI Express DMA IP Supporting Advanced Verification Tools for FPGA Development (Thursday Apr. 28, 2011)
  PLDA and Aldec today announced the immediate availability of PLDA’s EZDMA IP solution, supporting Aldec’s Riviera-PRO for Linux and Active-HDL for Windows.
  
  
• Digital Blocks Announces Compact DB8051C Microcontroller IP Core for Complex Algorithm Finite State Machine Implementations (Thursday Apr. 28, 2011)
  Digital Blocks today announces the DB8051C-FSM Microcontroller IP Core for algorithmic complex Finite State Machine (FSM) implementations.
  
  
• Kaben Wireless Announces Family of XTAL Oscillators (Wednesday Apr. 27, 2011)
  Kaben announced today a family of XTAL Oscillators in IBM and TSMC processes.
  
  
• Alvand Technologies Announce New Line of Silicon Proven Sub-System IP Solution (Wednesday Apr. 27, 2011)
  Alvand’s advanced data converter technologies are now incorporated into full-featured Sub-System IPs customized for a variety of applications: Wireless MIMO Analog Front-end, 4-Channel Video Analog Front-end and GigE Analog Front-end
  
  
• Cosmic Circuits tapes out Clocking Solutions in 55nm (Wednesday Apr. 27, 2011)
  Cosmic Circuits, a leading provider of differentiated Analog and Mixed-Signal IP cores, today announced the tape out of its clocking solutions in 55nm.
  
  
• Novocell Announces the Development of NovoBits: an Antifuse Alternative to Polyfuse (Thursday Apr. 21, 2011)
  Novocell Semiconductor, Inc. today announces the development of NovoBits, a register architecture antifuse non-volatile memory developed as an alternative to e-fuse and polyfuse memories. NovoBits offers a secure, highly reliable, drop-in solution that is foundry independent and promotes design portability.
  
  
• Kilopass Introduces Industry's First Embedded Multi-Time Programmable Non-Volatile Memory in 40nm Logic CMOS (Tuesday Apr. 19, 2011)
  Kilopass today unveiled Itera, the industry’s first and only embedded multi-time programmable (MTP) NVM in 40nm. Using Itera, system-on-chip (SoC) designers can achieve significantly lower costs (70% less), higher performance (24X increase), and improved integration by replacing external serial EEPROM and NOR flash in high-volume mobile and consumer applications.
  
  
• eMemory's NeoEE achieves verification, targets NFC applications (Tuesday Apr. 19, 2011)
  eMemory announces today that its embedded EEPROM SIP NeoEE has successfully achieved verification on the 0.18-micron 1.8V/3.3V process platform in Chinese foundries.