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IP / SOC Products News

• eMemory NeoFlash offers an unrivalled, most reliable embedded flash solution for automotive electronic applications (Wednesday Dec. 01, 2010)
  eMemory announces its success in launching automotive grade NeoFlash, the most reliable, robust, secured and cost-saving embedded flash solution.
  
  
• Cosmic Circuits announces silicon-proven Ultra-low power Wireless Analog IP in 65nm (Wednesday Dec. 01, 2010)
  Cosmic Circuits, a leading provider of differentiated Analog and Mixed-Signal IP cores, today announced that its next-generation IP cores for optimized wireless AFE are now silicon proven in the 65nm process node, and available for immediate integration in SoCs
  
  
• Albacores-IP Releases New Analog Video Multi Standard Decoder, TVV2 (Monday Nov. 29, 2010)
  Albacores-IP announced that it has developed a new Analog Video Multi Standard Decoder. The product, TVV2, will support all NTSC, PAL, and SECAM broadcast standards. The virtually artifact free new 2D comb filter is for NTSC, NTSC443 (brand new), PAL, PALm, PALc, PAL60, and NTSC50.
  
  
• ARM Mali GPU Makes Advanced Graphics a Reality for All Consumers (Monday Nov. 22, 2010)
  ARM today announced the ARM Mali™-300 graphics processing unit (GPU), supporting OpenGL ES 2.0 and bringing High Definition (HD) graphics performance to entry-level and mid-range consumer devices. The new GPU offers a seamless upgrade path from the Mali-200 GPU to make immersive gaming and HD1080p user interfaces (UI) a reality for all consumers.
  
  
• Dolphin Integration announces a thrilling release of the already celebrated Cassiopeia architecture for ROM (Friday Nov. 19, 2010)
  The latest release of the single metal via-programmable sROMet Cassiopeia is now available as a complement of Dolphin’s High Density and Low Power Panoply of silicon IP for the 130 nm process.
  
  
• Synopsys Announces Immediate Availability of the DesignWare ARC Processor Core for Blu-ray Disc Players (Friday Nov. 19, 2010)
  Synopsys today announced the immediate availability of the DesignWare™ ARC™ AS 221 BD dual-core processor optimized for high-definition (HD) audio applications.
  
  
• Chips&Media delivers latest dual HD video IP core with VP8 hardware decoding capability (Thursday Nov. 18, 2010)
  Chips&Media today announces that it has begun shipping fully validated hardwired codec, CODA960, which achieves multi-standard dual-HD(1080p@60fps) video processing to its partners.
  
  
• Gennum's Snowbush IP Group Offers Simulation Models for IP at 8Gbps and Beyond (Monday Nov. 15, 2010)
  Gennum today announced that its Snowbush IP group will be the first to support its high-speed PHY IP with simulation models based on the industry-standard IBIS-AMI (I/O Buffer Information Specification-Algorithmic Modeling Interface) specification.
  
  
• Dolphin Integration launches its new kit for ultra High Density audio converters (Friday Nov. 12, 2010)
  For high volume applications, such as multimedia devices, cost reduction is a main concern when designing a System-on-Chip. Nevertheless, the challenge is that cost reduction must be achieved while increasing performances of the device. Every way to reach this concern is welcomed by integrators. Dolphin Integration addresses these concerns for its audio converters through a double approach.
  
  
• ARM Announces CoreLink 400 System IP to Unleash High Performance CPU and GPU Systems (Wednesday Nov. 10, 2010)
  ARM today introduced the CoreLink™ 400 series of AMBA® 4 protocol-compliant system IP, enabling system designers to realize the full potential of the latest high-performance CPU and GPU technology.
  
  
• SuperSpeed USB 3.0 IP Core from CAST, Inc. Achieves USB-IF Certification (Wednesday Nov. 10, 2010)
  The USB Implementers Forum (USB-IF) has recently granted certification to the SuperSpeed USB 3.0 Device Controller IP Core from intellectual property provider CAST, Inc.
  
  
• Inicore Inc. Introduces VME System Controller Module Silicon IP Core (Wednesday Nov. 10, 2010)
  Inicore Inc., announced today the immediate availability of the VMESCmodule, a feature reach VME System Controller Module with slave and master capabilities.
  
  
• ARM Announces 32nm Cortex-A9 Processor Optimizations (Tuesday Nov. 09, 2010)
  ARM today announced their newest optimization package for the ARM® Cortex™-A9 processor, targeting Samsung 32nm LP High-K Metal Gate (HKMG) process technology. This ARM Processor Optimization Pack (POP) provides a highly tuned foundation for implementing Cortex-A9 processors in low power, mobile applications.
  
  
• ARM Announces Processor Optimization Pack Product Family for Cortex-A9 Processor (Tuesday Nov. 09, 2010)
  ARM today announced the immediate availability of the ARM® Cortex™-A9 Processor Optimization Packs (“POPs”). Processor Optimization Packs leverage ARM Artisan® physical IP to enable customers to achieve technology leading performance or power targets on their Cortex-A9 implementations in the shortest time to market.
  
  
• Moortec Embark on 40nm and 28nm Temperature Sensor IP Deliveries (Tuesday Nov. 09, 2010)
  Moortec Semiconductor announces it is designing embedded temperature sensor IP for TSMC's 40nm and 28nm processes. As well as a temperature sensor, Moortec will also be developing a crystal oscillator IP and special I/Os at 28nm.
  
  
• Analog Bits Extends Market Leadership with Advanced IP for ARM Cortex-A9 (Tuesday Nov. 09, 2010)
  Analog Bits today announced a new range of production qualified analog IP resulting from a collaboration with ARM. To support ARM's customers designing with the ARM Cortex- A9 core, Analog Bits has been developing a series of IP products designed to reduce customer risk while enabling more differentiation for their SOCs.
  
  
• VISION becomes real with DapTechnology's 1394b S1600 FireCore IP SOC Solution (Monday Nov. 08, 2010)
  DapTechnology announced today that the company will demonstrate the world’s first high speed S1600 1.6 Gigabit IEEE-1394b FireWire system-on-a-chip (SOC) and analysis solution at VISION 2010 in Stuttgart, Germany.
  
  
• Silicon Image Introduces MHL (Mobile High-Definition Link)- Enabled Intellectual Property Cores (Monday Nov. 08, 2010)
  Silicon Image today announced the availability of intellectual property (IP) cores that support the MHL™ (Mobile High-Definition Link) standard. MHL is a new mobile HD interface standard optimized for connecting mobile phones and other portable devices directly to high-definition televisions (HDTVs) and displays, while enabling power from the display to charge mobile device batteries over a single cable.
  
  
• Evatronix Ultra-High Resolution Display Controller IP Core Ready for 4K Digital Cinema Applications (Monday Nov. 08, 2010)
  Evatronix SA has released the next generation of its high-performance display controllers: the DISPLAY-CTRL-4K. This Digital Cinema Initiatives (DCI) compliant IP core supports resolutions of up to 4096x2160 pixels with 24 bits/pixel color depth. At Full HD resolution, the controller displays 60 frames per second, with a frame color depth of 48 bits/pixel.
  
  
• Dolphin Integration releases an innovative test solution for embedded memories (Friday Nov. 05, 2010)
  Dolphin Integration announces the HD BIST as a complement of its High Density - Low Power Panoply of silicon IP.
  
  
• Synopsys' New DesignWare STAR ECC IP Helps Reduce Embedded Memory Transient Errors (Tuesday Nov. 02, 2010)
  Synopsys today announced the availability of the DesignWare® STAR ECC (Self-Test and Repair Error Correcting Codes) IP as a part of its DesignWare STAR Memory System® product family.
  
  
• eSilicon's eFlexCAM cores enable 725 million searches per second (Thursday Oct. 28, 2010)
  eSilicon today announced the availability of production-proven eFlex content-addressable memory (CAM) cores and eFlexCAM compilers
  
  
• Synopsys' Silicon-Proven DesignWare HDMI 1.4a Tx Controller and PHY IP Receive HDMI Certification (Thursday Oct. 28, 2010)
  Synopsys today announced that Synopsys' DesignWare® High-Definition Multimedia Interface™ (HDMI™) 1.4a Transmitter (Tx) digital controller and PHY IP solutions in the 40-nanometer (nm) process node have achieved certification from an HDMI Authorized Training Center (ATC).
  
  
• DP8051 - accelerated world's fastest Digital Core Design 8051 IP Core (Tuesday Oct. 26, 2010)
  Digital Core Design released accelerated version of its DP8051 core running Dhrystone 2.1 benchmark program up to 15.55 times faster than the original 80C51 at the same frequency.
  
  
• Faraday's USB 3.0 Solution, from PHYs to Device Controllers, Are All Certified with Logo on Products (Tuesday Oct. 26, 2010)
  Faraday Technology today announced that its USB 3.0 device controller has passed USB-IF certification via its storage products and obtained the USB 3.0 logo. Since the corresponding PHY has also been certified through products months ago, the complete USB 3.0 solutions can be adopted by all the USB 3.0 device applications, from the bridge of the external HDD, SSD, flash disk, to the coming SoC integration.
  
  
• Elliptic First To Offer Commercial IP For New LTE-Advanced Security Algorithms (Thursday Oct. 21, 2010)
  Elliptic Technologies today launched its family of IP solutions in support of two new algorithms intended for Long Term Evolution (LTE) and LTE-Advanced 3GPP wireless networks acceptable to key Asian markets.
  
  
• Silicon Image Releases Enhanced, Scalable 4K-3D and Multi-Channel Video Decoder IP Core (Wednesday Oct. 20, 2010)
  Silicon Image today announced its enhanced, scalable cineramIC™ ultra high-definition video decoder. The cineramIC IP core is now capable of decoding up to 4Kx2K 3D at 60 frames per second — the leading edge of digital video technology advancements for prosumer and professional cameras and displays, including support for multi-channel decoding of up to 16 HD video streams simultaneously.
  
  
• Acorn Technologies Announces HellaPHY IP Core for Industry-Leading Performance in 4G Wireless Networks (Tuesday Oct. 19, 2010)
  Acorn Technologies today announced the launch of HellaPHY™, a chip-level IP core solution for OFDM-based 4G wireless networks that offers more than 60 percent gain in spectral efficiency.
  
  
• France's CNRS offers nano-memory IP (Tuesday Oct. 19, 2010)
  France's Centre National de la Recherche Scientifique (CNRS) has done preliminary work on several nanoelectronic memory technologies that it now wishes to progress further through licensing agreements.
  
  
• CEVA Expands Into 4G Wireless Infrastructure Market With Industry-First Vector DSP for Software Defined Radio Platforms (Tuesday Oct. 19, 2010)
  CEVA-XC323™ DSP delivers up to 4x performance improvement for 4G processing compared to incumbent infrastructure VLIW DSPs; Supports multi-core architectures and seamless software migration path from previous-generation infrastructure DSP vendors