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IP / SOC Products News

• Videantis Announces Support for WebM Project and VP8 Codec (Friday May. 21, 2010)
  videantis today announced that the WebM project and the open source VP8 video codec released by Google, Inc., will be supported on the videantis v-MPx programmable processor platform.
  
  
• IPextreme to Provide ColdFire IP Cores to Tabula Customers as Standard 32-Bit Processor for Tabula ABAX 3PLDs (Thursday May. 20, 2010)
  IPextreme and Tabula today announced Tabula's selection of the ColdFire(R) embedded controller as the 32-bit processor architecture of choice for Tabula ABAX(TM) 3PLDs. Under the agreement, Tabula's customers will have access to Freescale(R) ColdFire processor cores and other valuable IP cores at prices competitive with processor platforms from leading FPGA suppliers.
  
  
• Assisting the Customer to Get the Certification of USB 3.0 Host Controller, Faraday Sets A Great Milestone for Its and USB 3.0's Market Expansion in the Industry (Thursday May. 20, 2010)
  Faraday Technology today announced that the USB 3.0 host controller of its customer, Fresco Logic, has passed USB-IF certification and obtained the xHCI controller logo. This controller, developed based on Faraday's PHY, is the first certified USB 3.0 host controller in Taiwan and one of the only two in the world.
  
  
• SMSC Qualifies Kilopass Non-Volatile Memory for Rigorous TrueAuto Process (Wednesday May. 19, 2010)
  Kilopass and SMSC today announced that Kilopass’ XPM™ NVM has passed SMSC’s TrueAuto automotive quality process, and will be embedded in many of SMSC’s TrueAuto ICs.
  
  
• Analogix announces availability of DisplayPort 1.2 HBR2 5.4Gbps products (Wednesday May. 19, 2010)
  Analogix Semiconductor launched the first DP Transmitter (Tx) and Receiver (Rx) which support the VESA DisplayPort Standard version 1.2 High Bit Rate 2 (HBR2) mode. Compared with DisplayPort 1.1a, the VESA DisplayPort version 1.2 supports higher bandwidth, greater color depths, improved EMI performance with smaller process technologies and lower cost.
  
  
• MoSys and PLDA Partner to Deliver Complete PCI Express 2.0 and 3.0 IP Solutions (Tuesday May. 18, 2010)
  MoSys and PLDA have partnered to deliver complete PCI Express 2.0 and 3.0 PHY and controller IP solutions. The first integrated offering will combine MoSys' PCI Express 2.0 PHY with PLDA's XpressRich2 controller. The companies are also working together to provide an integrated PCI Express 3.0 solution
  
  
• Alizem releases new COTS Motor Control IP product for Pump and Fan applications (Tuesday May. 18, 2010)
  Alizem announces the release of its commercial-off-the-shelf (COTS) Motor Control IP product targeted for Pump and Fan based applications.
  
  
• Dolphin Integration complements their portfolio of ROM with a shrinked variant of Cassiopeia for the 152 nm process (Monday May. 17, 2010)
  Dolphin Integration’s offering of embedded ROMs has been steadily enriched for more than 20 years with generators from 500 nm down to 65 nm and soon 40 nm. The Ragtime family of metal programmable ROM is enriched with the release of generators of the dROMet Cassiopeia architecture for both the LP and G processes at TSMC 152 nm.
  
  
• Ridgetop Group Announces Solution Developed for Intermittency Detection in Electronic Components (Monday May. 17, 2010)
  Ridgetop Group announces a solution for detection of intermittencies on programmable processors. SJ BIST™ (Solder Joint Built-In Self-Test™) is a Verilog-instantiated soft-core product that can easily be integrated into Xilinx® or Altera field programmable gate arrays (FPGAs).
  
  
• Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65 Nanometer LL Process Technology (Thursday May. 13, 2010)
  Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing and Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI and SEHK: 0981.HK), one of the leading semiconductor foundries in the world, today announced the immediate availability of Synopsys' silicon-proven and USB logo-certified DesignWare(R) USB 2.0 nanoPHY intellectual property (IP) for SMIC's 65 nanometer (nm) low-leakage (LL) process technology.
  
  
• Actel's New Core1553 Development Kit Gives Access to MIL-STD-1553B Bus Evaluation System Based on Fusion Mixed Signal FPGAs (Wednesday May. 12, 2010)
  Actel today announced the new Core1553 Development Kit, providing customers with a self-contained benchtop 1553 bus development system. This new up-to-date development kit provides Actel's military and aerospace customers with an easy to use kit enabling development and testing of MIL-STD-1553B development using Actel's flight-heritage proven Core1553BRM IP core.
  
  
• CAST Offers the First 12-bit JPEG Extended Sequential, DICOM-Compatible IP Core (Wednesday May. 12, 2010)
  CAST now offers the only encoder core that supports both the Baseline (8-bit) and Extended Sequential (12-bit) modes of the JPEG image compression standard.
  
  
• Actel Continues to Ease Embedded Design with Extensive Library of IP (Tuesday May. 11, 2010)
  Actel today announced that embedded designers can now take advantage of a broad portfolio of Actel IP cores available for SmartFusion™ intelligent mixed signal FPGAs. SmartFusion mixed signal FPGAs are the only device that combines an FPGA, ARM® Cortex™-M3 processor and programmable analog on a single chip.
  
  
• VeriSilicon Expands SoC Platform with On2 Technologies Finland's Silicon Proven Video Solutions (Monday May. 10, 2010)
  VeriSilicon and On2 Finland today announced a wide-ranging partnership that adds the multi-format video encode/decode solutions from On2 Finland to VeriSilicon's expanding, system level star IP portfolio. The agreement gives VeriSilicon access to On2 Finland’s silicon proven IP, with support for a variety of video formats such as Real Video (RV), Divx, VP6, VP7, VP8 and AVS, for customer SoC designs targeting mobile and home entertainment consumer applications with varied market requirements.
  
  
• Dolphin Integration concentrates on cost-cutting with the Standard Cell Library HD-BTF for 65 nm processes (Friday May. 07, 2010)
  Fabless companies can seize the opportunity to decrease the area of their logic blocks by 5 to 10% with the highest-density Standard Cell Library available in the 65 nm technological process.
  
  
• Evatronix Introduces a 65C02 Chip Compatible Microprocessor IP Core (Thursday May. 06, 2010)
  Evatronix today announced the C65C02 – a 65C02 compatible microprocessor IP core that complies with the original 6502 Instruction Set Architecture by MOS Technology.
  
  
• Synopsys Unveils Ethernet Controller IP With New Audio Video Bridging Feature (Wednesday May. 05, 2010)
  Synopsys today announced the immediate availability of the DesignWare® Ethernet Quality-of-Service (QoS) Controller IP which implements the new IEEE specifications for audio video bridging (AVB) features.
  
  
• eMemory caters to market needs and offers a complete set of Multiple-Times-Programmable (MTP) Embedded Non-Volatile Memory solutions (Wednesday May. 05, 2010)
  eMemory’s Neobit OTP technology has been implementing into almost all process platforms in worldwide foundries. Just as Neobit technology’s fast growth has gained significant market share to retain number one popularization in the global OTP market, eMemory foresaw the future market needs and endeavored to the development of advanced embedded non-volatile memory technology, catering to customer needs with MTP solutions for large density and high endurance at a much lower cost.
  
  
• Synopsys Launches Industry's First MIPI DigRF v4 IP (Monday May. 03, 2010)
  Synopsys today announced the immediate availability of the DesignWare® MIPI® 4G DigRF(SM) Master Controller IP. By complementing its current silicon-proven DesignWare MIPI 3G DigRF Controller and PHY IP, Synopsys becomes the first vendor to offer a comprehensive IP portfolio for both the MIPI DigRF v3 and v4 standards.
  
  
• Microtronix introduces Scatter Gather DMA Engine for Altera PCIe Hard IP Cores (Monday May. 03, 2010)
  Microtronix today announced the release of their new Lancero Scatter-Gather DMA Engine for PCI Express for Altera® FPGA's incorporating PCI Express Hard IP cores. The kit provides the IP and Linux software drivers to implement a bidirectional Scatter-Gather Direct Memory Access (DMA) Engine for PCI Express interfaces on Linux host computer systems.
  
  
• New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces (Wednesday Apr. 28, 2010)
  Synopsys announced the availability of the high-performance DesignWare® Universal DDR Protocol and Memory Controllers, both supporting the DDR2, DDR3, Mobile DDR and LPDDR2 SDRAM standards.
  
  
• Imagination's POWERVR VXD391 adds On2 VP6 and Real Video capabilities (Tuesday Apr. 27, 2010)
  Imagination Technologies announces the latest member of its video decode IP core family, POWERVR VXD391. An ultra low power, high performance 1080p HD hardware video decoder IP core with multi-standard multi-stream capabilities, VXD391 now features the most extensive range of standards supported by a single video decoder, essential for accelerating all forms of video content found on the internet today, including Real Video 8/9, On2 VP6, and Sorenson Spark.
  
  
• Imagination debuts full range of TV audio codecs (Tuesday Apr. 27, 2010)
  Imagination Technologies will be demonstrating its latest application platform solutions for high performance, low power multi-channel, multi-standard audio utilising its META multithreaded processor technologies at ESC 2010.
  
  
• Plurality Ltd. Announces the World's First Scalable 256 Multicore Processor for Wireless Infrastructure (Tuesday Apr. 27, 2010)
  Plurality announced today the world's first scalable 256 multicore processor for wireless infrastructure, the HyperCore™ family of low power, small footprint, ManyCore processor IP for wireless markets.
  
  
• ARM CoreSight Technology Extends Real-time System Visibility to All Software Developers (Tuesday Apr. 27, 2010)
  ARMannounced today the launch of the ARM® CoreSight™ System Trace Macrocell and Trace Memory Controller providing software and system on chip (SoC) developers with a cost effective, industry-standard debug and optimization SoC platform solution.
  
  
• Elliptic Technologies Shatters Industry Latency Benchmark With New Ethernet Security Engine (Monday Apr. 26, 2010)
  Elliptic today announced that it has released the LLP-06 Ultra Low Latency MACsec security engine which offers a dramatic 30 percent improved latency (delay) performance over existing solutions available today.
  
  
• TAKUMI Launches GV330 The New Dedicated Vector Graphics IP Core with Significantly Enhanced Rendering Performance and Functionalities (Thursday Apr. 22, 2010)
  TAKUMI announced today official release of the new GSHARK-TAKUMI GV330 Vector Graphics Accelerator IP Core (“GV330”) compliant with OpenVG1.1, a graphics API standard for embedded systems.
  
  
• Tensilica Introduces Third Generation ConnX 545CK 8-MAC VLIW DSP Core (Thursday Apr. 22, 2010)
  Tensilica today introduced its third generation ConnX 545CK 8-MAC (multiply-accumulate) VLIW (very long instruction word) DSP (digital signal processor) core for system-on-chip (SOC) designs. Improvements in this third generation dataplane processor (DPU) core deliver up to 20 percent faster clock speed, 11 percent smaller die and up to 30 percent lower power consumption.
  
  
• Faraday Announces the Commercial Availability of PCIe Gen2 Endpoint Controller (Wednesday Apr. 21, 2010)
  Faraday Technology today announced the availability of its commercial PCI Express (PCIe) Gen2 endpoint (EP) controller. This new component is fully compliant with the industry standard PCIe Based Specification 2.0 at the maximum speed of 5.0GT/s.
  
  
• Virage Logic Extends Technology Leadership by Qualifying the Industry's First Million-Cycle CMOS-Based MTP NVM IP (Wednesday Apr. 21, 2010)
  Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today announced that its AEON® MTP (Multiple Time Programmable) NVM (non-volatile memory) EEPROM IP has been qualified for a million cycles at an elevated temperature of 105°C in a standard 250-nanometer (nm), 5V CMOS process.