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IP / SOC Products News

• Blue Wonder Communications Launches LTE-IP Product BWC200 (Thursday Feb. 04, 2010)
  Blue Wonder Communications, the independent design house and licensor of LTE-IP and system solutions, today announced the availability of its embeddable LTE modem IP (Intellectual Property) product BWC200. It constitutes a complete LTE subsystem that can easily be integrated in System-on-Chip (SoC) platforms and consists of a complete physical layer including layer 1 hard- and software.
  
  
• Posedge Announces ONFI-2.2 Compliant Universal Flash Controller IP Core (Thursday Feb. 04, 2010)
  Posedge has announced the availability of Universal Flash Controller (UFC) Soft IP Core that interfaces to NAND, NOR, and Serial Flash devices fully conforming to standards such as the latest Open NAND Flash Interface Working Group (ONFI) 2.2 specification. Posedge has developed a flexible and high performance Universal Flash Controller leveraging its vast experience in Storage and Flash Systems.
  
  
• Cyclic Design Releases Advanced BCH Error Correction IP for Next Generation NAND Flash Applications (Wednesday Feb. 03, 2010)
  Cyclic Design announces advanced BCH ECC, supporting the next generation flash memory devices that require higher levels of error correction codes (ECC). Companies can preserve their investment in existing NAND flash hardware and software solutions by upgrading to this ECC infrastructure.
  
  
• SMSC Launches MediaLB Device Interface Macro IP Supporting 6-Pin MediaLB (Tuesday Feb. 02, 2010)
  SMSC today announced the availability of its OS62420 MediaLB® Device Interface Macro IP including 6-pin support. The macro offers a complete MediaLB device supporting both single-ended MediaLB 3-Pin and additionally the new differential MediaLB 6-Pin interfaces to Media Oriented Systems Transport (MOST®) Intelligent Network Controllers (INICs).
  
  
• MoSys Announces Breakthrough Bandwidth Engine ICs and Serial Chip-to-Chip Communications Interface for Next Generation Networking Applications (Tuesday Feb. 02, 2010)
  MoSys today unveiled a roadmap for its new Bandwidth Engine™ integrated circuit (IC), which will combine MoSys' patented 1T-SRAM® high-density embedded memory with its ultra high-speed 10 Gigabits per second (Gbps) SerDes interface (I/O) technology and an arithmetic logic unit (ALU).
  
  
• Innopower Offers Industrial-leading Miniaturized Cell Library, the miniLib+ and miniIO+, in 130nm, 110nm, 65nm and 55nm Technologies (Tuesday Feb. 02, 2010)
  Innopower Technology, a wholly owned subsidiary of Faraday Technology, announced today the availability of the industrial-leading miniaturized cell libraries, miniLib+™ and miniIO+™, in 130nm, 110nm, 65nm and 55nm Technologies.
  
  
• Arasan Chip Systems offers a complete line of Memory Card Controller IP Cores and Software stacks (Tuesday Feb. 02, 2010)
  Arasan announced today the availability of a complete portfolio of Memory Card Controller IP cores and corresponding software stacks. These card controller IP support the highest performance card formats: Secure Digital (SD / SDIO 3.0), Multimedia Card (e.MMC 4.4), Memory Stick (MSPro, MSPro-Duo), CompactFlash (CF+) and Picture Card (xD) card formats.
  
  
• IP Cores, Inc. Announces an Update of its Elliptic Curve Crypto Accelerator (Tuesday Feb. 02, 2010)
  IP Cores, Inc. Announces an Update of the ECC1 Elliptic Curve Cryptography (ECC) Accelerator that Simplifies the ECDH and ECDSA firmware implementation.
  
  
• Tensilica Introduces HiFi EP DSP Core for High Quality Audio in Home Entertainment and Smartphone Applications (Monday Feb. 01, 2010)
  Tensilica today introduced HiFi EP, a superset of the HiFi 2 architecture that is optimized for simultaneous multichannel codec support and/or continuously expanding audio pre and post processing in home entertainment products such as Blu-ray Disc players, digital television (DTV), and Smartphones. It has also been enhanced for very efficient, high-quality voice pre-and post-processing.
  
  
• Chips&Media to Demonstrate Latest IP at Mobile World Congress 2010 (Monday Feb. 01, 2010)
  Chips&Media today announced that it will show off its advanced decoder and encoder IP cores, Coda851 and Chips&Media-powered end products at Mobile World Congress 2010.
  
  
• Dolphin Integration announces the availability of a complete FREE evaluation kit for its Memory CACHE controller (Friday Jan. 29, 2010)
  Dolphin Integration announces the availability of a complete FREE evaluation kit for its Memory CACHE controller. Its name I-Stratus-LP stands for its position at level L1 as Instruction Cache for any processor in search for Low-Power.
  
  
• Aeroflex Gaisler Announces the Next Generation Leon Processor (Wednesday Jan. 27, 2010)
  Aeroflex Gaisler today announced the next generation LEON processor - the LEON4, providing the industry a high performing, licensable 32-bit processor core based on the SPARC V8 architecture. The LEON4 complements the widely used LEON3 processor for high-performance embedded applications across a broad spectrum of demanding consumer and industrial applications.
  
  
• Dolphin Integration: the embedded audio CODEC with smallest power consumption on the market (Monday Jan. 25, 2010)
  The Helium architecture, already successfully implemented by Dolphin Integration in 130 nm G audio CODECs, is now adapted to the 180 nm and its shrunk versions at 160 nm and 152 nm. Specifically suited for portable applications requiring the longest playback capability, Helium components are cost-optimized both through silicon area and through lowest Bill-of-Material.
  
  
• Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions (Monday Jan. 25, 2010)
  Synopsys today announced the addition of silicon-proven DesignWare® MIPI IP consisting of 3G DigRF Controllers and PHY, Camera Serial Interface 2 (CSI-2) Host Controller and D-PHY to its IP portfolio.
  
  
• Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies (Monday Jan. 25, 2010)
  IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth
  
  
• Arasan Chip Systems provides complete solutions for the key Bus Interfaces in the emerging Netbook market (Monday Jan. 25, 2010)
  Arasan Chip Systems announced that its IP portfolio provides the most comprehensive and complete set of solutions for the growing Netbook market
  
  
• Vivante and Animated Media Partner to Offer Embedded Flash Solutions Optimized for Vivante OpenGL ES 2.0 Graphics Processors (Wednesday Jan. 20, 2010)
  Flash Tools Can Be Used to Create Browser-less Embedded Flash Applications that are Translated To OpenGL ES 2.0 and Rendered by the Vivante GPU
  
  
• Ukalta Engineering Introduces FPGA-Based Fading Channel Simulators (Wednesday Jan. 20, 2010)
  Ukalta Engineering today introduced its line of FPGA-based fading channel simulators. Available as ultra-compact IP cores, wireless developers can now rapidly and easily validate the performance of their communication systems under realistic radio channel conditions, all on a single FPGA.
  
  
• Dolphin Integration strengthens their portfolio of Standard Cell libraries with the DUAL innovation targeting Low Power designs (Monday Jan. 18, 2010)
  HD-BTF.DV is the custom tailored standard cell library of medical applications, power sensitive nomad applications and battery-driven industrial applications
  
  
• Evatronix USB 2.0 Controller Secures USB Certification for Richnex High Speed USB Transceivers (Monday Jan. 18, 2010)
  Evatronix SA and Richnex announced today the successful USB certification of the Richnex USB transceiver - RN1170, in which the Evatronix USB High Speed On-The-Go Controller IP was implemented as a reference design.
  
  
• Intelop announces Xilinx FPGA development platform for their TCP-Offload Engine SoC IP (Monday Jan. 18, 2010)
  Intelop announces Xilinx FPGA development platform for their TCP-Offload Engine SoC IP for customers to easily develop networking solutions with TCP/IP acceleration. This second generation Customizable Full TCP offload integrates GEMAC, ARP module, PLB/AMBA 2.0 bus interfaces with Optional PCIe interfaces running at 2-Gbps also is capable of managing hundreds of simultaneous TCP sessions at delivering 10-20 times performance improvement over TCP/IP software implementations.
  
  
• Synopsys Introduces Industry's First SystemC TLM-2.0 SuperSpeed USB 3.0 Models (Tuesday Jan. 12, 2010)
  Synopsys today announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC™ Initiative (OSCI) TLM-2.0 API specification.
  
  
• Arasan Chip Systems Adds DigRFSM 3G IP to its MIPI IP Portfolio (Tuesday Jan. 12, 2010)
  Arasan Chip Systems announced the release of its DigRFSM 3G IP core that enables the integration of 2.5G/3G cellular chipsets into mobile platforms.
  
  
• Imagination announces META AXD audio processor IP platform (Friday Jan. 08, 2010)
  Imagination Technologies, a leading multimedia chip technologies company announces META AXD, a full audio IP platform delivering a complete multi-standard and multi-stream audio solution for System-on-Chip (SoC) designs.
  
  
• Imagination Technologies announces POWERVR SGX545 graphics IP core with full DirectX 10.1, OpenGL 3.2 and OpenCL 1.0 capabilities (Friday Jan. 08, 2010)
  Imagination Technologies announces POWERVR SGX545, the first and only DirectX10.1 capable embedded graphics IP core available for immediate licensing.
  
  
• New Imagination Technologies' video decoder cores to support On2 VP6 video format (Friday Jan. 08, 2010)
  Imagination Technologies and On2 Technologies are working together to enable Imagination Technologies to support decoding of On2 video formats, beginning with On2 VP6, which will be introduced into the POWERVR VXD family in early Q1 2010.
  
  
• Magnum Semiconductor Launches a High Definition Video Compression IP Solution (Thursday Jan. 07, 2010)
  Magnum Semiconductor announced today it is launching an IP license business, which will provide its high-quality Video CODEC IP, proven through decades of deployment in Tier 1 video markets, to Semiconductor companies.
  
  
• Imagination demonstrates real time Wi-Fi and reveals ATSC capabilities on latest ENSIGMA UCCP310 communications IP platform (Thursday Jan. 07, 2010)
  Imagination Technologies is demonstrating a test chip incorporating Imagination’s latest ENSIGMA UCCP310 IP platform . This is the only multi-standard communications IP core available in the market today that can be demonstrated to deliver both 802.11 a/b/g Wi-Fi connectivity and a broad suite of demodulators required for digital TV broadcasts worldwide, including ATSC and all of the major European and Japanese terrestrial standards, in a single programmable IP core.
  
  
• Imagination demonstrates POWERVR FRC270 Frame Rate Conversion IP Core (Thursday Jan. 07, 2010)
  POWERVR FRC IP cores enable highly intelligent up-sampling of up to HD resolution content from 24fps to 100/120fps up to 200/240fps, with excellent de-judder and motion de-blur characteristics. The IP core will be shown running in a real-time FPGA-based system.
  
  
• SoftJin announces PAL-NTSC Encoder IP for various display systems including SDTV and HDTV (Thursday Jan. 07, 2010)
  SoftJin’s PAL-NTSC Encoder IP (along with SoftJin’s HD Video encoder IP) accepts SD/ HD video data generated by various sources such as video decoders (MPEG/ H.264 decoder) and converts it to data format accepted by a wide range of analog and digital display devices. The IP is capable of sending data in both SD and HD formats.