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IP / SOC Products News

• Pico Semiconductor Announces the Availability of GPON IP (Thursday Jan. 08, 2009)
  The IP is a GPON ONT SERDES capable of receiving serial data at the rate of 2.488Gbps and transmitting data at the rate of 1.244Gbps with an unmatched jitter performance. The IP core is capable of operating from 0.9V to 1.35V supply voltages and requires no external components.
  
  
• Xilinx Delivers High Quality of Service Connectivity Solution for Streaming Media Across Ethernet AVB Networks (Thursday Jan. 08, 2009)
  Developed in collaboration with Harman International Industries, the Xilinx(R) Ethernet AVB LogiCORE(TM) intellectual property (IP) core uses cutting-edge programmable technology to easily adapt to changes in the emerging IEEE 802.1 Ethernet AVB standard and support custom features. The first release of the Ethernet AVB LogiCORE IP is immediately available for Xilinx Virtex(R)-5 and Spartan(R)-3A field programmable gate array (FPGA) platforms.
  
  
• Xilinx and Xylon Deliver Flexible, Low-Cost Programmable logiTAP Platform for Embedded GUI System Development (Thursday Jan. 08, 2009)
  The logiTAP platform is a full-featured system on programmable chip (SoPC) solution with a touch screen display that enables rapid, cost-effective development, prototyping, and deployment of graphical human-machine interfaces (HMIs) targeting high-volume electronics applications.
  
  
• Synopsys DesignWare Controller and PHY IP for PCI Express Successfully Pass PCI-SIG 2.0 Compliance Testing (Wednesday Jan. 07, 2009)
  Synopsys today announced that its DesignWare® digital controller and PHY IP for the PCI Express® 2.0 technology is the first complete, single-vendor PCI Express 2.0 IP solution to successfully pass the PCI Express 2.0 compliance testing at the PCI-Special Interest Group (PCI-SIG®) workshop held in Taiwan in October 2008.
  
  
• Coreworks' announces Stereo and Multi-Channel Configurable Serial Audio Transceivers targeted for next generation broadcasting and digital TV products (Wednesday Jan. 07, 2009)
  Corework’s family of Configurable Multi-Channel Serial Audio Interfaces supports audio devices from a multitude of IC manufacturers and frees designers from vendor dependence while accelerating time-to-market
  
  
• ARC Launches "Sound-to-Silicon" Audio IP Solutions For Portable, DTV, Home Theater, and PC/Laptop Consumer Products (Wednesday Jan. 07, 2009)
  ARC International (LSE: ARK) today introduced new vertically integrated audio intellectual property (IP) solutions for three major consumer electronics product categories: digital TVs and home theaters, portable media devices, and PC and laptop computers. These “sound-to-silicon” solutions comprise ARC’s industry leading audio enrichment software, low power hardware platform, optimized codecs and related software, and development and mastering tools and services.
  
  
• IP Cores from IPextreme Support Mentor Graphics' Precision Synthesis FPGA Tool (Friday Dec. 19, 2008)
  IPextreme has validated its Multi-CAN Controller, its CJTAG-IEEE1149.7 IP cores and its 32-bit Power Architecture e200, V1 ColdFire, V2 ColdFire, 16-bit CR16CP and 8-bit HCS08 processor cores for use with Mentor Graphics Precision® Synthesis flow.
  
  
• Faraday Offers the Miniaturized Cell Library miniLib in both 90nm and 65nm (Thursday Dec. 18, 2008)
  Faraday today announced the availability of the commercial 90nm and 65nm miniaturized cell libraries, miniLib™, in both standard process (SP) and low leakage (LL). The advantage of miniLib™ is its core area reduction, up to 15% in various cases, and still keeping all the merits of their corresponding generic cell libraries. These two miniLib™ has been silicon proven via many function verification through real chips.
  
  
• Renesas Technology Receives Certification for New IP that Supports the PCI Express 2.0 High-speed Serial Interface Standard (Wednesday Dec. 17, 2008)
  Renesas Technology America today announced the development of a new logical- and physical-layer intellectual property (IP) conforming to PCI Express Base Specification Revision 2.0 (PCI Express 2.0 or PCIe 2.0), the latest version of the widely used serial interface standard. This IP allows data transfers at up to 5.0 gigabits per second (5Gbps) and supports the 65-nm semiconductor process node.
  
  
• Synopsys USB 2.0 PHY IP for Advanced 40-Nanometer Process First to Pass USB-IF Certification (Wednesday Dec. 17, 2008)
  Synopsys' technology-leading USB 2.0 nanoPHY mixed-signal IP, now available in a native 1.8V architecture, meets the full USB 2.0 specification including 5V short tolerance for 24 hours and 3.3V operation. This architecture helps designers embed the DesignWare USB 2.0 PHY IP into system-on-chips (SoCs) utilizing the most advanced process geometries without compromising performance or long-term reliability.
  
  
• Elliptic Introduces Ellipsys Security Architecture Premier Security Software Solution for Embedded Systems (Wednesday Dec. 17, 2008)
  ESA combines these solutions into an overall framework that provides an efficient and portable software solution for embedded security designs. It offers the flexibility to add hardware offload engines either from Elliptic or through cryptographic cores available in popular processors from Intel, Freescale, AMCC and Raza Microelectronics among others.
  
  
• Arasan Chip Systems First to Provide End-to-End Solution with MIPI D-PHY IP (Tuesday Dec. 16, 2008)
  The Arasan D-PHY is a complete serial communications cell optimized for implementing the physical layer of the MIPI DSI, CSI and UniPro protocol. The Arasan D-PHY IP substantially exceeds the MIPI electrical and performance specification, achieving over 1 Gbps transfer speeds per lane, thus delivering a robust design without sacrificing performance.
  
  
• Alma Technologies Launches a High Performance SPDIF-T SPDIF Transmitter Core (Tuesday Dec. 16, 2008)
  The SPDIF-T core implements the SPDIF digital audio transmitter interface in a compact, high-performance, stand-alone package ideal for digital audio applications. The SPDIF-T core conforms to the ISO/IEC 60958, ISO/IEC 61937, AES/EBU, AES3 and SMPTE 337M standards.
  
  
• Virage Logic Expands Silicon Proven 40-Nanometer Embedded Memory and Logic Library IP Portfolio to Low Power Processes (Tuesday Dec. 16, 2008)
  The expanded SiWare(TM) product portfolio provides semiconductor companies with 40nm physical IP that is designed to enable Systems-on-Chip (SoCs) to run faster, manage power more efficiently, use less area, and achieve higher manufacturing yields.
  
  
• Actel Announces Barco's DO-254 Certifiable ARINC 429 IP Core Targeted to ProASIC3 FPGAs (Monday Dec. 15, 2008)
  Actel's ProASIC3 A3P1000 devices, featuring Barco's BA511 ARINC 429 IP core, were selected for a total of four DO-254 certified implementations in commercial aviation programs, including two at the highest Design Assurance Level (DAL-A), and two at the second highest level (DAL-B).
  
  
• Denali Software Features Comprehensive Toggle-Mode DDR NAND Solutions (Thursday Dec. 11, 2008)
  Denali Software is first to announce its comprehensive support of Toggle-mode DDR NAND memory with complete, end-to-end intellectual property (IP) products that enables quick development of system-on-chip (SoC) designs.
  
  
• Evatronix introduces a SuperSpeed USB Device Controller and Verification IP Solution (Thursday Dec. 11, 2008)
  Evatronix’ USB 3.0 Device Controller is designed to the USB 3.0 specification, which provides for a data throughput of up to 5Gbps. This is over 10 times greater than Hi-Speed USB architecture, reflecting the change that has taken place in the portable device market. With storage values exceeding 1 terabyte, USB is evolving to meet consumers’ needs.
  
  
• Verayo Secures FPGAs with Silicon Signatures (Wednesday Dec. 10, 2008)
  Verayo today announced the availability of its new Soft PUF technology for FPGAs and FPGA-based systems. Soft PUF extracts chip-unique signatures to authenticate the FPGA silicon, the underlying board or system.
  
  
• IPextreme announces availability of Freescale HCS08 microprocessor IP Core (Wednesday Dec. 10, 2008)
  The Freescale HCS08 is a synthesizable, state-of-the-art, high performance and low power 8-bit microprocessor that can be easily integrated into any ASIC or FPGA design. The HCS08 also provides an easy migration path to Freescale’s 32-bit ColdFire architecture.
  
  
• LogicVision and Dolphin Technology Join Forces to Deliver Industry's Most Advanced High-Yield Embedded Memory Solution (Tuesday Dec. 09, 2008)
  LogicVision and Dolphin Technology today announced that Dolphin Technology is offering an integrated high-performance and high-yield embedded memory solution that combines the best-in-class technologies from both companies.
  
  
• CAST Deciphers Security System Design Challenges with New AES Encryption IP (Thursday Dec. 04, 2008)
  CAST, Inc. today announced a new family of AES IP cores that make it easier for designers to include fast hardware encryption in security-sensitive electronic systems.
  
  
• Plurality's 64-Core Accelerator Delivers Market's Highest Performance per Cost, Power and Size (Wednesday Dec. 03, 2008)
  Plurality Ltd. today announced the industry’s first complete silicon Intellectual Property (IP) solution for its HyperCore™ processor, the market’s most powerful, space-saving and energy-efficient 64-core shared-memory processing engine.
  
  
• Silicon Image Introduces 225 MHz HDMI v1.3 PHY IC and Soft Link IP Core for Consumer Electronics Applications (Monday Dec. 01, 2008)
  Silicon Image today announced its 225 MHz HDMI™ version 1.3 PHY solution, consisting of the SiI9204 HDMI v1.3 transmitter PHY semiconductor and companion HDMI v1.3 link layer intellectual property (IP) core.
  
  
• eMemory 0.13um OTP Used in LCD Driver Mass Production at TSMC (Wednesday Nov. 26, 2008)
  eMemory have entered the stage of mass production of 0.13um embedded NVM at tsmc, and of completeness in constructing TSMC 0.13um OTP 1.5V/6V/32V high-voltage platform and 0.13um OTP Fuse availability, providing application for high efficiency small panel LCD driver IC in terms of enhancement of customers’ competitiveness.
  
  
• DE Releases UltraLong FFT IP Cores for Xilinx FPGAs (Tuesday Nov. 25, 2008)
  DE announces the availability for immediate delivery the UltraLong FFT IP Core for Xilinx FPGAs
  
  
• Imagination Technologies extends POWERVR I2P Interlace-to-Progressive scan converter IP core family (Tuesday Nov. 25, 2008)
  These latest versions of Imagination's broadcast quality interlace-to-progressive scan converter technology deliver substantially improved image quality, without silicon area penalty. Both cores are available for licensing from Imagination now and are already in design with Imagination's lead partners.
  
  
• POWERVR SGX540 from Imagination Technologies now in silicon (Tuesday Nov. 25, 2008)
  POWERVR SGX540 typically delivers twice the performance of POWERVR SGX530 while consuming significantly less than double the silicon area or power consumption.
  
  
• Sundance and Dillon Marry Fastest FFT with Fastest Virtex-5 LXT FPGA (Monday Nov. 24, 2008)
  Sundance and Dillon Engineering Merge Signal Processing Expertise and FFT IP to Deliver Benchmark Performance for Embedded Defense, Industrial, Geophysical & Medical Systems
  
  
• Ultra-low power 16-bit microcontroller core consumes less than 40 uA per MIPS. (Friday Nov. 21, 2008)
  Tiempo today announces its new chip, fully operational at first run, that silicon-proves its 16-bit microcontroller core IP – TAM16 – on a CMOS 130 nm general-purpose process. The chip logic has been entirely designed in Tiempo’s innovative asynchronous and delay insensitive technology.
  
  
• Northwest Logic Announces the Immediate Availability of x8 PCI Express 2.0 Solution For Xilinx Virtex-5 FXT FPGA Platform (Saturday Nov. 21, 1998)
  This solution combines Northwest Logic’s full-featured x8 PCI Express 2.0 cores and software to provide a complete, pre-packaged x8 PCI Express 2.0 solution. The solution enables high-performance x8 PCI Express 2.0 designs to be quickly developed for Virtex-5 FXT FPGAs.