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IP / SOC Products News

• Arm Introduces LPDDR2 Memory Controller to Accelerate Chip Performance and Improve Energy Savings (Tuesday Oct. 07, 2008)
  ARM today announced the ARM® PrimeCell® low-power DDR2 (LPDDR2) dynamic memory controller (PL342), which provides a high-performance interface to LPDDR2 memory systems that provide more than twice the bandwidth of LPDDR memory systems and deliver significant power savings over standard DDR2 memory.
  
  
• videantis announces full HD 1080p video codec IP solution for mobile and consumer devices (Monday Oct. 06, 2008)
  By combining a powerful, programmable high definition stream unit with multiple video engines, the v-MP4180HDX solution is capable of encoding and decoding video up to full HD 1080p resolution in a wide range of standards on extremely small silicon area with less than 1MHz load on the host CPU.
  
  
• Arasan Chip Systems Drives Strategic Mobile Initiative with Release of MIPI DSI IP Solution (Thursday Oct. 02, 2008)
  Arasan today announced the first Mobile Industry Processor Interface (MIPITM) Display Serial Interface (DSI) IP commercially available on the market.
  
  
• Coresonic reveals demonstration platform that delivers world's smallest and most efficient WiMAX solution (Wednesday Oct. 01, 2008)
  Coresonic will demonstrate the company's LeoCore WiMAX personality pack running on a new FPGA-based evaluation system to show how it is possible to add a complete mobile WiMAX solution to any device with very little additional silicon.
  
  
• Sarnoff Europe Releases Silicon-proven ESD Solutions for Advanced Applications in 40nm CMOS (Monday Sep. 29, 2008)
  Targeted and suitable for the specific design challenges of advanced consumer applications in 40nm, the silicon-proven ESD solutions feature extremely low power consumption (50pA leakage), enable high signal speeds (100fF linear ESD load) and provide high ESD performance for external pins (8kV HDMI).
  
  
• MIPS Technologies Expands HDMI Portfolio with Industry’s First 45nm IP Cores; 90nm IP in Silicon (Monday Sep. 29, 2008)
  MIPS today announced an expansion of its HDMI IP portfolio, with the industry's first 45nm IP cores (Controller + PHY), as well as 90nm IP cores in silicon.
  
  
• A New Offering of High-Resolution Audio DACs for Resident Consumer Applications by Dolphin Integration (Monday Sep. 29, 2008)
  loDAC audio converters are proposed with different Signal to Noise Ratios (SNR) to cover a wide range of applications: from the entry level Set-Top-Box, and now up to the high-end DVD player needing 5.1 channel processing with a SNR up to 110 dB.
  
  
• New HiveGo CSS Product Line From Silicon Hive and Acutelogic Provides Complete Embedded Camera Imaging Subsystems for SoC Makers (Tuesday Sep. 23, 2008)
  Silicon Hive and Acutelogic Enter Into Partnership Enabling SoC Makers To Buy One Stop Camera Imaging Solutions Which Combine Silicon Hive’s Efficient Programmable Processors With Acutelogic’s Ultra-High Quality And Robust Image Processing and Camera Control Algorithms.
  
  
• IQ Analog announces industry first 8-Channel Analog Front End IC (Tuesday Sep. 16, 2008)
  After three years of development, IQ Analog announces the arrival of the IQA-F430 Octal Analog Front End (AFE), ushering in the next generation mixed signal front end platform for wireless and communication applications.
  
  
• On2 Technologies Announces New High Definition Hardware Encoder IP (Monday Sep. 15, 2008)
  The Hantro 7280 enables real-time video encoding up to 1280 x 1024 resolution for low-power chipsets
  
  
• eMemory and MagnaChip Partner to Offer Non-Volatile Memory Logic and High Voltage Processes (Wednesday Sep. 10, 2008)
  eMemory and MagnaChip today announced that the Neobit-embedded non-volatile memory (NVM) intellectual property has received final verification to be applied in CMOS logic and high-voltage processes.
  
  
• High Performance DDR3 SDRAM Controller from Eureka Technology Supports AHB and AXI Bus Interface. (Monday Sep. 08, 2008)
  Eureka’s DDR3 SDRAM controller is designed specifically to harness the performance advantage of the DDR3 SDRAM. It employs high speed design techniques such as fast page access, pipeline design and smart arbitration. The controller supports both DDR2 and DDR3 SDRAMs to enable a smooth transition between the two SDRAM technologies.
  
  
• intoPIX Introduces its New Range of JPEG 2000 Mathematically Lossless IP-Cores (Monday Sep. 08, 2008)
  The M-Lossless family is able to process 10, 12 and up to 16 color bit depth, HD 1080 resolutions up to 60p and DCI 2K and 4K compliant formats in real-time, keeping bit-to-bit reversibility.
  
  
• Verayo Launches, Introduces Security Solutions Based on "Unclonable" Silicon Chips (Thursday Sep. 04, 2008)
  The core technology that makes these silicon chips unclonable is called Physical Unclonable Functions (PUF). PUF is like a biometrics technology for silicon chips. It extracts a type of “electronic DNA or fingerprint” that is unique to each silicon chip, and uses it for authentication and security applications.
  
  
• GDA Technologies Adds AXI to Its Serial RIO Silicon IP (Wednesday Sep. 03, 2008)
  AXI Bridge was added to GDA's GRIO Serial RIO IP and to enhance designs demanding high performance, low latency, low pin count, reliability and scalability.
  
  
• Anchor Bay Offers New Low-Cost HDMI 1.3 Deep Color Video-Processing IC for Blu-ray Players and AV Receivers (Wednesday Sep. 03, 2008)
  The ABT1030 fully supports HDMI 1.3 with Deep Color™ (36-bit inputs and outputs) and xvYCC colorimetry capabilities, featuring 12-bit input and output resolutions. Video signals from 480i up to full 1080P HDTV is completely supported as well when using the ABT1030's pass-through mode.
  
  
• IPextreme Announces Availability of Market's First IEEE 1149.7 cJTAG Semiconductor IP Core (Tuesday Sep. 02, 2008)
  Texas Instruments, a key contributor to the development of the IEEE 1149.7 standard, collaborates with IPextreme to bring compact JTAG (cJTAG) IP to market
  
  
• Evatronix enhances its NAND Flash Controller with OCP interface and BCH error correction code (Monday Sep. 01, 2008)
  Both BCH algorithm and OCP socket further facilitate the component’s implementation in various System-on-Chip (SoC) environments, as well as significantly reduce the IP core’s gate count while retaining its outstanding performance.
  
  
• DOLPHIN Integration completes its 65 nm Library with the AURIGA sROMet (Monday Sep. 01, 2008)
  The new sROMet AURIGA demonstrates an outstanding architectural property for a single metal programmable solution. Indeed it reuses the same architecture as its twin spRAM URANUS.
  
  
• Moortec Deliver High Performance Transmit Mixer/AGC for UWB Applications (Friday Aug. 29, 2008)
  Moortec deliver a high frequency (9GHz) mixer with high linearity for an Ultra Wideband (UWB) wireless application. The design is silicon proven on a 0.18um BiCMOS process.
  
  
• China readies first multicore Godson CPUs (Thursday Aug. 28, 2008)
  Chinese researchers are preparing the first multicore versions of Godson, the country's first homegrown microprocessor, with a four- and eight-core designs scheduled to tape out in the coming months. China hopes to build a petaflops high-performance computer based on the Godson-3 in 2010.
  
  
• Fresco Logic Demonstrates Industry's First SuperSpeed USB Data Transfer (Thursday Aug. 21, 2008)
  Demonstration Showcases SuperSpeed USB Data Transfer Speed of Over 350 MB/s on Fresco Logic's Hardware Development Platform
  
  
• Arasan Chip Systems Reveals Strategic Mobile Initiative (Wednesday Aug. 20, 2008)
  This strategic initiative centers on 2 key areas: (1) Arasan's technology expertise in the mobile IP space and (2) an "Arasan driven IP eco-system" of partners and customers throughout the mobile market.
  
  
• STMicroelectronics Demonstrates First Physical Layer IP For 6Gb/s SATA Hard Disk Drives (Tuesday Aug. 19, 2008)
  ST’s 6Gb/s SATA PHY is an IP (Intellectual Property) block designed to be integrated with other functions into low power System-on-Chip (SoC) devices supporting 1.5 and 3 Gb/s as well as 6 Gb/s SATA HDDs for mobile and desktop computing applications
  
  
• IBM Builds World's Smallest SRAM Memory Cell (Monday Aug. 18, 2008)
  IBM and its joint development partners -- AMD, Freescale, STMicroelectronics, Toshiba and CNSE -- today announced the first working static random access memory (SRAM) for the 22 nanometer (nm) technology node.
  
  
• ARM Mali-200 GPU Compliant With OpenGL ES 2.0, OpenGL ES 1.1 and OpenVG 1.0 (Friday Aug. 15, 2008)
  The ARM® Mali™-200 graphics processing unit (GPU) is compliant with the full range of Khronos embedded 2D and 3D graphics standards: OpenGL ES 2.0, OpenGL ES 1.1 and OpenVG 1.0.
  
  
• POWERVR SGX First with Conformance for all Khronos Mobile APIs on Production Silicon (Friday Aug. 15, 2008)
  Imagination’s POWERVR MBX 3D acceleration core is also conformant with Khronos’ OpenVG 1.0.1 and OpenGL ES 1.1 APIs.
  
  
• Synopsys Launches Full Range of Silicon-Proven DDR3 and DDR2 IP Solutions for SoC Designs (Wednesday Aug. 13, 2008)
  The DesignWare DDR IP solutions deliver memory system performance of up to 1600 Mbps, the maximum data-rate of the JEDEC DDR3 specification. The solutions include configurable protocol and memory controllers, integrated mixed-signal PHYs including I/Os and verification IP.
  
  
• Crocus Establishes Prototyping Environment for Next Generation MRAM Technology (Tuesday Aug. 12, 2008)
  Crocus Technologies today announced that it has qualified its complete manufacturing environment for the development and rapid prototyping of MRAM.
  
  
• Silvus Technologies and Ittiam Systems Announce Expanded Product Line and Commercial Availability of 802.11n IP Solution (Monday Aug. 11, 2008)
  Silvus Technologies and Ittiam Systems today announced the availability of an expanded line of PHY/MAC 802.11n IP solutions, which now covers multiple MIMO configurations (1x1, 2x2, 4x4).