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IP / SOC Products News
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Small, robust flash cell claims easy process integration (Monday May. 23, 2005)
The addition of nonvolatile memory to a system-level IC is never an easy proposition. Often, design teams take the easy way out and simply put flash in an external chip
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Xilinx Strengthens DSP IP Library with New Floating-Point and Digital Video Broadcasting S2 Cores (Thursday May. 19, 2005)
New Floating Point Core enables Adaptive beam forming antenna system and Radar Signal Processing
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Denali Announces Design IP, Verification IP Products for Serial ATA Standard (Wednesday May. 18, 2005)
Databahn Design Cores, PureSpec Verification IP Speed time-to-market, Reduce Risk for SATA Designs
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Kaben Develops Synthesizer IP for WiMAX in IBM7WL (Wednesday May. 18, 2005)
Kaben Research Inc., a leading developer of mixed-signal, Intellectual Property (IP) blocks for Wireless, System-on-a-Chip (SoC) manufacturers, announced today that it has developed a synthesizer IP block for WiMAX applications in the IBM7WL process
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Elixent launches next generation Reconfigurable Algorithm Processor technology (Tuesday May. 17, 2005)
The D-Fabrix v2.0 architecture allows designers to implement signal processing algorithms in half the silicon area required by previous reconfigurable systems, and with substantially reduced power consumption
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CEVA Unveils a New Addition to the Powerful CEVA-X DSP Family (Monday May. 16, 2005)
The CEVA-X1621(TM) Combines the High Performance Level of the CEVA-X1620(TM) DSP Core with an Advanced Cache Memory Subsystem
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MIPS Technologies Introduces the MIPS32 24KE Core Family - the First DSP ASE Enabled MIPS Cores (Monday May. 16, 2005)
Highest Performing Licensable Synthesizable Cores Provide Efficient DSP Architecture with Significant Overall Reduction in Die Area and Cost
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New Xilinx MicroBlaze Soft Processor Increases Clock Frequency By 25% (Monday May. 16, 2005)
MicroBlaze 4.00 features tightly-coupled Floating Point Unit option
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ARM Announces Class-Leading BDTI DSP Scores For The ARM1136J-S Processor (Monday May. 16, 2005)
BDTI Benchmark results confirm that the ARM1136J-S processor achieves 25 percent better performance than the competition
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Tensilica Xtensa LX Processor Beats All Other Processors and Cores On EEMBC Networking 2.0 and Office Automation Benchmarks (Monday May. 16, 2005)
Xtensa LX Nearly 4X Faster than Next Closest Competitor
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New Floating Point Extensions for ARC Cores Enable Full Performance Math Functionality Without a Coprocessor (Monday May. 16, 2005)
ARC FPX Extensions Set New Standard For Die Size Efficiency and Low Power
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Mentor Graphics Announces Certification of its High-Speed USB On-The-Go Controller IP (Friday May. 13, 2005)
This was the first event at which the USB-IF has recognized standard compliance for high-speed USB 2.0 OTG, which provides high bandwidth communications in consumer products, such as digital cameras, game consoles, set-top boxes, digital printers and scan
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Synopsys' Hi-Speed USB OTG IP is First and Only Complete IP Solution To Earn Hi-Speed USB OTG Certification (Friday May. 13, 2005)
Certified digital and PHY IP gives designers the flexibility to choose from 130nm or 90nm processes
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Sarnoff ESDdoctor(TM) Offers ESD Solutions For New ICs, Trouble-Shoots Problems In Existing Chips (Thursday May. 12, 2005)
Silicon IP Cores Drop Into I/O Sections, Work With Standard Processes
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Sarnoff Introduces Silicon Proven ESD Design Tool Kit For ICs, Matched To Specific Foundry Processes (Thursday May. 12, 2005)
Allows Users To Design First-Time-Right I/O Sections With High Performance And Optimized, Robust ESD Protection
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Kaben Develops Synthesizer IP for Software Defined Radios in IBM5HP (Wednesday May. 11, 2005)
Kaben Research Inc., a leading developer of mixed-signal, Intellectual Property (IP) blocks for Wireless, System-on-a-Chip (SoC) manufacturers, announced today that has developed KR-SDS-32-IBM5HP-01 Synthesizer IP block for software defined radio applicat
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Mobius Microsystems Introduces the All-silicon Copernicus Clock (Tuesday May. 10, 2005)
Fully-integrated high-performance clock generator achieves highest total frequency accuracy for all-silicon clocks
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X-FAB Extends MEMS Platform - Pressure Sensor IP Cores and SOI-MEMS Now Available (Tuesday May. 10, 2005)
With this novel concept X-FAB supports foundry customers who are designing single chip solutions where the piezoresistive pressure sensor is integrated with mixed-signal electronics
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Synopsys Delivers Industry's First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance (Tuesday May. 10, 2005)
Leading Digital Core Combined with High-performance PHY Lowers Risk for SoC Designers
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OCP-IP Announces Availability of Mentor Graphics CheckerWare Library of Verification IP (Tuesday May. 10, 2005)
The CheckerWare solution is comprised of a library exceeding 100 assertion checkers and protocol monitors, making possible the quick adoption of cutting edge assertion-based and formal verification methodologies without the cost and risk often associated
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ARC International and Tao Group Provide the Lowest Power Java Solution for Embedded Devices (Monday May. 09, 2005)
ARC and Tao Set Industry Record on Performance/Power for CaffeineMarks
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Matsushita launches 'integrated platform' chip strategy (Tuesday May. 03, 2005)
Matsushita Electric Industrial Co. will roll out in the second half of 2005 a scalable silicon architecture.
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Sarnoff H.264 Decoder Delivers High-Quality Video On Portable Devices, Cell Phones (Tuesday May. 03, 2005)
Silicon IP Makes High-Def Video Portable
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PLDA Announces Immediate Availability of the PCI Express EZ IP Module (Monday May. 02, 2005)
The EZ IP Module is targeted to PCI designers making the shift to PCI Express and to experienced PCI Express designers looking for a robust yet simple PCI Express interface
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LSI Logic Delivers Low Power SATA Core for ASIC and RapidChip(R) Platform ASIC Designs (Monday May. 02, 2005)
LSI Logic SATA-IO compliant host- and device-side core IP now available for easy integration into leading manufacturers' system-on-chip (SoC) designs
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LEON3 has passed SPARC V8 compliance testing (Sunday May. 01, 2005)
LEON3 has passed SPARC Architecture Version 8 compliance testing on May 1, 2005 and has been declared SPARC V8 Compliant
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Tallika announces immediate availability of DDR I/II Controller Cores (Friday Apr. 29, 2005)
Tallika Corporation, an Intellectual Property and Design Services Company, today disclosed that it has been shipping DDR I/II Controller Core to beta customers
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Kaben Enters Baseband Video DAC IP Market (Thursday Apr. 28, 2005)
The DAC is based on Delta-Sigma technology and is ideal for applications requiring high linearity and precise reconstruction of analog signals. The target technologies are TSMC's 0.13 and 0.18 micron processes; however the IP is mostly digital and therefo
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SMIC and Dolphin Integration Partner to Offer Microprocessor Core for 0.35-micron EEPROM Process (Tuesday Apr. 26, 2005)
Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI and HKSE: 981) and Dolphin Integration SA have entered a partnership to offer the state-of-the-art Flip8051 Virtual Components (ViC) microprocessor cores optimized for customers using
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RF Engines' 1GHz Spectrometer Core drives unprecedented performance enhancements in radio astronomy (Tuesday Apr. 26, 2005)
RF Engines Ltd, Newport, Isle of Wight, UK, the world-leading supplier of signal processing technology for FPGA, has announced a new Spectrometer IP core for FPGA that enables the rapid development of very wideband spectral analysis systems








