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IP / SOC Products News
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Xiphera contributes to Linux kernel (Thursday Dec. 17, 2020)
Xiphera's Linux driver for the XIP8001B TRNG (True Random Number Generator) Intellectual Property (IP) core has been added to the Linux kernel source tree.
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CORE-v CVE4 RTL Freeze Milestone Achieved (Monday Dec. 14, 2020)
The OpenHW CV32E40P RISC-V core is the first open-source core for high-volume chips verified with the state-of-the-art process required for high-integrity, commercial SoCs.
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Nextera Video and Adeas Announce SDI Core, SMPTE ST 2022-8, and NMOS IS-09 as the Latest Additions to their Industry-Leading SMPTE ST 2110 Video over IP FPGA Core Set (Monday Dec. 14, 2020)
Nextera Video and Adeas are proud to announce that their industry-leading SMPTE ST 2110 Video over IP FPGA cores now support NMOS IS-09 System Parameters, as well as SMPTE ST 2022-8, SDI Core, and Frame Synchronizer companion cores.
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Renesas Strengthens IP License Portfolio with IP Utilities to Facilitate Device Development (Thursday Dec. 10, 2020)
Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced the release of IP Utilities – a new series of solutions aimed at simplifying the development of devices incorporating Renesas intellectual property (IP).
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eMemory & PUFsecurity Announce with UMC the World's First PUF-based Secure Embedded Flash Solution (Thursday Dec. 10, 2020)
eMemory and its subsidiary, PUFsecurity, and United Microelectronics Corporation (NYSE:UMC; TWSE: 2303) ("UMC"), a leading global semiconductor foundry, announced today the successful joint development of the world’s first PUF (Physical Unclonable Function)-based secure embedded flash solution.
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SmartDV Announces New Line of Design IP Controllers for High-Speed Communications (Wednesday Dec. 09, 2020)
SmartDV™ Technologies, the Proven and Trusted choice for Design and Verification Intellectual Property (IP), today acquired the Design IP business and products from a leading, pure-play engineering services company, for an undisclosed amount.
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Seagate Designs RISC-V Cores to Power Data Mobility and Trustworthiness (Wednesday Dec. 09, 2020)
Seagate Technology plc (NASDAQ: STX) announced that it has designed two processors based on the open RISC-V instruction set architecture (ISA).
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Silvaco and OPENEDGES Announce Availability of Integrated DDR Controller and PHY IP Solutions (Wednesday Dec. 09, 2020)
ilvaco Inc., a leading supplier of EDA software and design IP, today announced a collaboration with OPENEDGES Technology, Inc., a leading provider of memory subsystem IP, to prove the integration of the OPENEDGES DDR memory controller with Silvaco DDR PHYs.
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Think Silicon Announces a New Scalable Multi-Core GPU Product Suite with Extended Graphics and Video Functionality (Wednesday Dec. 09, 2020)
Think Silicon S.A., the leading provider of ultra-low power GPU IP for embedded systems, today announced it is shipping its updated NEMA®|pico XS and NEMA®|pico XL Multi-Core GPU IP-Series to customers.
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Menta eFPGA and Codasip Announce Technology Partnership (Tuesday Dec. 08, 2020)
Menta S.A.S, a premier supplier of embedded FPGA (eFPGA) solutions, today announced its close collaboration with Codasip, a leading supplier of processing solutions for IC designers.
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Menta and Andes Announce Partnership Enabling Hardware Reconfiguring for ISA Extension (Tuesday Dec. 08, 2020)
Menta S.A.S, a premier supplier of embedded FPGA (eFPGA) solutions, today announced a technology IP cooperation with Andes Technology, a founding premier member of RISC-V International and the leading supplier of 32/64bit RISC-V embedded CPU cores.
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Dolphin Design unveil a new and improved version of its Power Controller IP - MAESTRO - to speed-up energy-efficient SoC design (Monday Dec. 07, 2020)
With the growing chip complexity observed in many market segments, in addition to a need for longer battery life, SoC design teams are forced to adopt advanced power management techniques to improve the energy-efficiency of their devices.
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Codasip announces three new RISC-V Application Processor Cores providing Multi-core and SIMD capability (Friday Dec. 04, 2020)
Codasip, the leading supplier of customizable RISC-V® processor IP, today announces three new 64-bit RISC-V application processor cores: the A70XP™ provides support for RISC-V P extensions, and the A70X‑MP™ and A70XP‑MP™ enable the creation of symmetric multi-processor (SMP) systems.
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intoPIX delivers its new full stack of TICO-RAW solutions improving RAW image workflows and camera designs (Friday Dec. 04, 2020)
intoPIX, leading provider of innovative image processing solutions, announces today a full stack of TICO-RAW products, immediately available for implementers.
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CFX announces commercial availability of anti-fuse OTP technology on Silterra I11L process (Friday Dec. 04, 2020)
CFX, the one stop shop of embedded flash memory IP and stand alone flash memory IC provider announced today commercial availability of anti-fuse OTP technology on Silterra I11L process.
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Andes RISC-V Vector Processor NX27V Is Upgraded to RVV 1.0 (Thursday Dec. 03, 2020)
Andes Technology today announces the first commercial RISC-V vector processor IP, AndesCore™ NX27V, is upgraded to support the latest RISC-V Vector (RVV) extension spec (version 1.0), and several key features.
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BrainChip Confirms Completion of the Akida Production Design (Thursday Dec. 03, 2020)
BrainChip Holdings Ltd (ASX: BRN), a leading provider of ultra-low power high performance artificial intelligence technology, today provides the following update on the development of the Company’s Akida™ Neuromorphic System-on-Chip. (NSoC).
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Mobiveil Announces Compute Express Link (CXL) 2.0 Design IP, Successful Completion of CXL 1.1 Validation with Intel's CXL Host Platform (Wednesday Dec. 02, 2020)
Mobiveil, Inc., a fast-growing supplier of silicon intellectual property (SIP), platforms and IP-enabled design services, today announced its Compute Express Link™ (CXL) 2.0 Design IP and successful completion of CXL 1.1 validation with Intel’s CXL host platform.
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PCIe Gen5 & PCIe Gen4 Phy IP available in TSMC 12FFC (Wednesday Dec. 02, 2020)
T2M-IP is pleased to announce the immediate availability of PCIe Gen5 Phy IP Core and PCIe Gen4 Phy IP Core on TSMC 12FFC 12nm FinFET process with matching digital Controller IP Cores, which are designed to support all required features of the PCIe 5.0 32GT/s(Gen5), PCIe 4.0 16GT/s(Gen4), 3.1 8GT/s(Gen3), 2.1 5GT/s(Gen2) and 1.1 2.5GT/s(Gen1), compliant with latest PIPE specifications.
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PLDA Announces the Successful CXL Interoperability with pre-production Intel Xeon CPU, Code Named Sapphire Rapids (Tuesday Dec. 01, 2020)
PLDA, the industry leader in high-speed interconnect solutions, today announced the successful CXL™ interoperability with pre-production Intel Xeon processors code named Sapphire Rapids.
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Andes Announces New RISC-V Processors: Superscalar 45-Series with Multi-core Support and 27-Series with Level-2 Cache Controller (Monday Nov. 30, 2020)
Andes Technology Corporation, the leader in RISC-V CPU solutions, today proudly announces new members of AndesCore™: high performance superscalar A45MP and AX45MP multicore processors, and A27L2 and AX27L2 processors with Level-2 (L2) cache controller.
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Bluetooth RF Transceiver Phy KGD for adding Bluetooth Connectivity to "any SoC" (Monday Nov. 30, 2020)
T2M-IP, the global independent Semiconductor IP Cores, SW & Technology provider, is pleased to announce the availability of a Bluetooth LE RF Transceiver Phy KGD for instantly adding Bluetooth connectivity to any SoC with an embedded CPU.
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Xiphera announces FPGA-based TLS 1.3 IP core for mission-critical applications (Monday Nov. 30, 2020)
Xiphera Ltd., an expert in the field of hardware-based cryptography IP cores, launches a resource-optimised TLS 1.3 IP core with entirely FPGA-based cryptography and key management to serve software-independent security for Industrial Internet of Things (IIoT). The TLS 1.3 IP core brings a mission-critical level of security to industrial automation applications.
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CEVA's Bluetooth Low Energy 5.2 Platform is First IP to Receive Bluetooth SIG Qualification (Monday Nov. 23, 2020)
CEVA, Inc. (NASDAQ: CEVA), the leading licensor of wireless connectivity and smart sensing technologies, today announced that its RivieraWaves Bluetooth® Low Energy (LE) 5.2 Platform has achieved Bluetooth SIG Qualification.
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Wi-Fi HaLow Reference Platform Available from Palma Ceia SemiDesign (Friday Nov. 20, 2020)
Palma Ceia SemiDesign announced today the availability of the company’s Wi-Fi HaLow Reference Platform, including all necessary hardware and software, for the design of Wi-Fi HaLow devices and systems based on the IEEE 802.11ah specification.
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GUC Die-to-Die (D2D) Total Solution Opening the New Era of Flagship SoC (Tuesday Nov. 17, 2020)
Global Unichip disclosed today that it has successfully demonstrated the silicon-proven GLink (GUC multi-die interLink) interface using TSMC 7nm process and TSMC InFO_oS advanced packaging technology for AI, HPC and Networking applications to do multi-die integration for system scaling.
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Marvell Announces Industry's First 112G 5nm SerDes Solution for Scaling Cloud Data Center Infrastructure (Tuesday Nov. 17, 2020)
Marvell (NASDAQ: MRVL) today unveiled the industry's first 112G 5nm SerDes solution that has been validated in hardware. The DSP-based SerDes boasts industry-leading performance, power and area, helping to propel 112G as the interconnect of choice for next generation 5G, enterprise, and cloud data center infrastructure.
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Imagination launches multi-core IMG Series4 NNA - the ultimate AI accelerator delivering industry-disruptive performance for ADAS and autonomous driving (Thursday Nov. 12, 2020)
Imagination Technologies announces IMG Series4, its next-generation neural network accelerator (NNA) for advanced driver-assistance systems (ADAS) and autonomous driving. Series4 targets automotive industry-leading disruptors as well as Tier 1s, original equipment manufacturer (OEMS) and automotive semiconductor system-on-chip (SoC) manufacturers.
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Faraday's 22nm Fundamental IP Adopted for Intelligent IoT Devices (Thursday Nov. 12, 2020)
Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced that its 22ULP/ULL fundamental IP set has been adopted by customers in multiple IC developments, including IP camera SoCs, true-wireless-stereo (TWS) earphone SoCs, IoT SoCs, and voice recognition AI processors.
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CAST Releases MIPI I3C Basic Slave Controller IP Core (Tuesday Nov. 10, 2020)
The new I3C-S MIPI I3C Basic Slave Controller core supports the latest I3C Basic specification, is suitable for any I3C bus topology, and is easy to configure and use. It includes—uniquely, the company believes—an I3C to AMBA AHB bridging mode.






