D&R Headline News | Most Popular | SoC News Alerts | |

IP / SOC Products News

• Silicon Creations to Showcase PLL Developments on 22nm to 5nm Processes at TSMC 2019 Open Innovation Platform Ecosystem Forum (Monday Sep. 23, 2019)
  Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), announced a variety of new IP offerings on TSMC’s N5, N5P, N7, N7+, 12FFC, and 22ULP and 22ULL processes, designed to support customers’ SoC timing and clock demands.
  
  
• Moortec Drives Optimised Performance & Increased Device Reliability on TSMC's N5 and N5P Process Technologies with its Complete In-Chip Monitoring Subsystem (Monday Sep. 23, 2019)
  Moortec, a leading provider of in-chip monitoring and optimisation IP, today announced the availability of its latest In-Chip Monitoring IP Subsystem on TSMC’s N5 and N5P process technologies.
  
  
• Rambus Announces Portfolio of Advanced Memory and SerDes PHYs on TSMC N7 Process (Monday Sep. 23, 2019)
  Rambus, a premier silicon IP and chip provider making data faster and safer, today announced a broad portfolio of high-speed memory and SerDes PHYs for next-generation applications on TSMC’s industry-leading N7 process technology.
  
  
• Spectral Design and Test Inc., Announces a New Family of MemoryIP Targeted at the 5G Market (Monday Sep. 23, 2019)
  Spectral Design & Test Inc. (SDT), a leading provider of embedded Memory Development platform is announcing a portfolio of Memory Compilers targeted at 5G applications that include base stations & edge IOT markets.
  
  
• eSilicon Announces Availability of 7nm High-Bandwidth Interconnect (HBI+) PHY for Die-to-Die Interconnects (Monday Sep. 23, 2019)
  eSilicon announced today its 7nm high-bandwidth interconnect (HBI™)+ physical interface (PHY) IP is available to be licensed for inclusion in customer designs.
  
  
• CAST CAN 2.0/FD Bus IP is Safety-Ready with ISO 26262 Certification (Friday Sep. 20, 2019)
  CAST, Inc. today announced that its CAN 2.0 and CAN FD Bus Controller IP Core is certified as ISO 26262 ASIL-B ready. The company believes this is the first such CAN IP core to receive ISO 26262 certification.
  
  
• SmartDV Announces Availability of Ethernet TSN Design IP (Tuesday Sep. 17, 2019)
  SmartDV™ Technologies today announced its Design IP for the Ethernet Time-Sensitive Networking (TSN) protocol, an update to the IEEE standard for time-sensitive transmission of data over Ethernet networks.
  
  
• CEVA Introduces New AI Inference Processor Architecture for Edge Devices with Co-processing Support for Custom Neural Network Engines (Tuesday Sep. 17, 2019)
  CEVA today announced from AutoSens in Brussels, Belgium, NeuPro-S, its second-generation AI processor architecture for deep neural network inferencing at the edge.
  
  
• Synopsys' New Embedded Vision Processor IP Delivers Industry-Leading 35 TOPS Performance for Artificial Intelligence SoCs (Monday Sep. 16, 2019)
  DesignWare ARC EV7x Vision Processors with Deep Neural Network Accelerator Provide More Than 4X Performance Increase for AI-intensive Edge Applications
  
  
• Synopsys Simplifies Automotive SoC Development with New ARC Functional Safety Processor IP (Monday Sep. 16, 2019)
  Expanded Portfolio of ISO 26262 ASIL B and ASIL D Compliant DesignWare ARC Processors Accelerate Safety Certification of ADAS, Radar/LiDAR, and Automotive Sensor SoCs
  
  
• Silex Insight releases ARIA crypto engine for the Korean market (Thursday Sep. 12, 2019)
  Silex Insight, the leading provider of embedded Security IP, extends its broad range of Cryptographic IP cores with the release of the ARIA crypto engine, the block cipher standard in Korea.
  
  
• AGIC C-Fuse OTP High-Temperature-Immunity Tailored for AEC-Q100 Grade 0 Applications (Thursday Sep. 12, 2019)
  AGI Corporation (AGIC) announced that AGIC C-Fuse OTP macros are tailored for AEC-Q100 Grade 0 applications that require high reliable operation and long-life data retention in high-temperature environments.
  
  
• Synopsys Delivers Industry's First Compute Express Link (CXL) IP Solution for Breakthrough Performance in Data-Intensive SoCs (Wednesday Sep. 11, 2019)
  Synopsys, Inc. (Nasdaq: SNPS) today announced availability of its complete DesignWare® Compute Express Link (CXL) IP solution consisting of controller, PHY, and verification IP for AI, memory expansion, and high-end cloud computing system-on-chips (SoCs).
  
  
• PLDA Achieves PCI Express 4.0 Compliance for its XpressRICH PCIe Controller IP During the First Official PCI-SIG PCIe 4.0 Compliance Workshop (Monday Sep. 09, 2019)
  PLDA, the industry leader in PCI Express® IP and data interconnect solutions, today announced that their XpressRICH™ PCIe® Controller IP passed all Gold and Interoperability tests at the PCI-SIG® Compliance Workshop, held in August 2019 in Burlingame, CA.
  
  
• eMemory IP Garners Most Stringent Level of Certification for Automotive Applications (Monday Sep. 09, 2019)
  eMemory, the semiconductor industry’s leading provider of non-volatile memory intellectual property, has won key certifications for its technology in automotive applications. eMemory is the only company in the greater China region to receive these dual IP certifications.
  
  
• PUFsecurity Leverages NeoPUF to Lead Hardware Security Technology (Friday Sep. 06, 2019)
  Charles Hsu, the chairman of eMemory, the world’s seventh largest supplier of semiconductor-based intellectual property (IP), believes that his company has found the solution to an expensive and urgent cybersecurity problem. His company is spinning off PUFsecurity to popularize PUF technology in the marketplace.
  
  
• Silex Insight and Wave Computing Collaborate to Deliver Security-Conscious Artificial Intelligence (AI) Platforms Across Enterprise and Automotive Markets (Thursday Sep. 05, 2019)
  
  
  
• Credo Announces Production Availability of HiWire Active Electrical Cables (Wednesday Sep. 04, 2019)
  Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology which delivers high performance, low power connectivity solutions for 100G, 400G, and 800G port enabled networks, today announced the production availability of HiWire™ Active Electrical Cables (AEC).
  
  
• HDL Design House Introduces Expandable SoC IoT Platform (Thursday Aug. 22, 2019)
  HDL Design House today announced the launch of its easily expandable, reusable and flexible SoC IoT Platform using the Arm® Corstone™ foundation IP package.
  
  
• UPMEM Puts CPUs Inside Memory to Allow Applications to Run 20 Times Faster (Monday Aug. 19, 2019)
  UPMEM announced today a Processing-in-Memory (PIM) acceleration solution that allows big data and AI applications to run 20 times faster and with 10 times less energy.
  
  
• Arasan Chip Systems expands its storage IP Portfolio with ONFI 4.1 PHY and I/O PAD IP seamlessly integrated with its NAND Flash Controller IP for UMC 28nm SoC Designs (Monday Aug. 19, 2019)
  Arasan today announced the immediate availability of its NAND Flash Controller PHY and I/O Pad IP for UMC 28nm SoC designs compliant to the latest ONFI 4.1 Specifications.
  
  
• Faraday Leads Industry with 28G Programmable SerDes at 28nm for Networking ASIC (Thursday Aug. 08, 2019)
  Faraday today announced the availability of its 28Gbps programmable SerDes PHY IP on UMC 28HPC process technology.
  
  
• VeriSilicon Launches VIP9000, New Generation of Neural Processor Unit IP (Wednesday Aug. 07, 2019)
  VeriSilicon, a Silicon-Platform-as-a-Service (SiPaaS®) company, today announces VIP9000, a highly scalable and programmable processor for computer vision and artificial intelligence.
  
  
• Enhancing System Architecture Implementation for AI Applications, Microchip Delivers its Analog Embedded SuperFlash Technology (Tuesday Aug. 06, 2019)
  Microchip Technology’s SuperFlash memBrain™ neuromorphic memory solution provides substantial reduction in compute power to improve AI Inference at the edge
  
  
• Arasan to demonstrate its SD Card UHS-II PHY IP and eMMC 5.1 PHY IP for 12nm SoC Designs at the 2019 Flash Memory Summit (Monday Aug. 05, 2019)
  Arasan today announced that they will demonstrate their latest products on TSMC’s industry-leading 12nm process, the SD Card UHS-II PHY and eMMC 5.1 PHY on a test chip.
  
  
• PLDA Announces Major PCIe 5.0 Design Win on Cutting Edge 5nm Process Node (Thursday Aug. 01, 2019)
  PLDA today announced a major PCIe 5.0 design win on cutting edge 5nm process node. PLDA’s PCIe 5.0 Controller IP was selected not only for its solid design and unmatched compatibility with popular PCIe PHYs, but also for PLDA’s best-in-class tech support, its ease of customization and PLDA’s integration expertise.
  
  
• InAccel Accelerates XGboost and releases the IP core for FPGAs (Wednesday Jul. 31, 2019)
  Recently major cloud and HPC providers like Amazon AWS, Alibaba, Huawei and Nimbix have started deploying FPGAs in their data centers. However, currently there are limited cases of wide utilization of FPGAs in the domain of machine learning.Towards this end, InAccel has released today as open-source the FPGA IP core for the training of XGboost.
  
  
• Mixel Granted US Patent for its Innovative MIPI D-PHY RX+ Configuration (Wednesday Jul. 24, 2019)
  Mixel announced today that its proprietary RX+ MIPI D-PHYSM IP implementation was granted a US Patent for its unique testability features. U.S. Patent No. 10,289,511 was issued on May 14, 2019, for Mixel, Inc., encompassing a novel MIPI® system entitled “Differential physical layer device with testing capability.”
  
  
• Arasan announces the immediate availability of its Ultra Low Power MIPI D-PHY IP Compliant to D-PHY Specification v1.20 for TSMC 22nm SoC Designs (Thursday Jul. 18, 2019)
  Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automobile SoCs today announced the immediate availability of it’s 2’nd Generation MIPI D-PHY IP with Ultra Low Power Consumption for TSMC 22nm SoC’s.
  
  
• InAccel releases world's first universal bitstream repository for FPGAs based on JFrog (Thursday Jul. 18, 2019)
  InAccel, a company specialized on FPGA accelerators, developed world’s first bitstream repository for FPGAs based on the JFrog artifactory. JFrog artifactory is an artifact repository manager, which is entirely technology agnostic and fully supports software created in any language or using any tool. It is also the only enterprise-ready repository manager available that supports secure, clustered, high availability of file registries.