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IP / SOC Products News

• GLOBALFOUNDRIES Strengthens 22FDX eMRAM Platform with eVaderis' Ultra-low Power MCU Reference Design (Tuesday Feb. 27, 2018)
  GLOBALFOUNDRIES and eVaderis today announced that they are co-developing an ultra-low power microcontroller (MCU) reference design using GF’s embedded magnetoresistive non-volatile memory (eMRAM) technology on the 22nm FD-SOI (22FDX®) platform.
  
  
• AccelerComm and Achronix Enable Fast Time to Market with 5G Polar Code for Speedcore eFPGAs (Tuesday Feb. 27, 2018)
  Achronix Semiconductor Corporation, a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA), announced its collaboration with AccelerComm Ltd, a semiconductor intellectual property (IP) company focusing on next-generation wireless communications acceleration.
  
  
• Neural Network Inference Engine IP Core Delivers >10 TeraOPS per Watt (Tuesday Feb. 27, 2018)
  VeriSilicon Expands Leadership in Deep Neural Network Processing with Breakthrough NN Compression Technology VIP8000 NN Processor Scaling from 0.5 to 72 TeraOPS
  
  
• Sonics Partners With Inomize To Enable Automotive Chip Design For ISO 26262 Standard (Tuesday Feb. 27, 2018)
  Sonics announced a partnership with Inomize (Netanya, Israel) that enables chip designs to comply with the ISO 26262 automotive functional safety standard using Sonics’ NoCs with Inomize’s ASIC design platforms and services.
  
  
• Synopsys Delivers Industry's First Complete UFS 3.0 IP Solution for High-Performance Embedded and Removable Storage (Monday Feb. 26, 2018)
  Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first complete Universal Flash Storage (UFS) IP solution, compliant with the latest JEDEC UFS v3.0 standard
  
  
• CEVA Extends its IP Platforms for Bluetooth and Wi-Fi with RISC-V (Monday Feb. 26, 2018)
  CEVA today announced that its market-leading RivieraWaves Bluetooth and Wi-Fi intellectual property (IP) platforms are now offered with an optional integrated open-source RISC-V MCU.
  
  
• CEVA Introduces PentaG - A Comprehensive 5G New Radio Enhanced Mobile Broadband IP Platform for Smartphones, Fixed Wireless Access and Embedded Devices (Thursday Feb. 22, 2018)
  Compliant to the 3GPP 5G New Radio (NR) Release-15 and software upgradable for Release-16, PentaG is targeted at smartphones, fixed wireless access and the many other embedded devices that can take advantage of multi-gigabit data rates to enable services and use cases such as 4K video streaming, augmented reality, virtual reality, autonomous driving and home
  
  
• SoC-e's MTSN Switch IP Core solution now supports 802.1AB (LLDP) (Thursday Feb. 22, 2018)
  The MTSN Switch IP Core, launched in October last year, continues to receive numerous updates which include new features and enhancements. In the last major update support for 802.1AB or LLDP (Link Layer Discovery Protocol) has been included.
  
  
• Arm delivers integrated SIM identity to secure next wave of cellular IoT devices (Wednesday Feb. 21, 2018)
  Arm has a vision of a trillion connected devices by 2035, and each of these devices will need a secure identity, enabling stakeholders to establish trust – for example, allowing a service provider to trust its device base so it can authenticate devices, provide value added services and if needed, issue security updates.
  
  
• CEVA Announces Industry's First 802.11ax Wi-Fi IPs (Tuesday Feb. 20, 2018)
  Building on its market leadership in Wi-Fi IP, CEVA is the first company to offer licensable 802.11ax solutions, providing its customers with a comprehensive platform to integrate the latest Wi-Fi standard into their next-generation product designs.
  
  
• MIPS and NetSpeed Partner to Deliver Solutions for AI and ML SoCs (Wednesday Feb. 14, 2018)
  MIPS, the provider of the widely used MIPS processor architecture and IP cores, and NetSpeed Systems, Inc. announced today a strategic partnership to deliver interoperable solutions that enable leading-edge performance in SoCs for Artificial Intelligence (AI) and Machine Learning (ML) applications.
  
  
• IntelliProp Announces Q1 2018 Release of Gen-Z IP Cores Supporting Rev 1.0 Specification (Wednesday Feb. 14, 2018)
  IntelliProp announced today that they will release a full package of Gen-Z IP Cores that will enable companies to design Gen-Z products supporting the Core Specification Rev 1.0 release.
  
  
• SiFive Launches World's First Linux-Capable RISC-V Based SoC (Wednesday Feb. 07, 2018)
  SiFive launched the industry’s first Linux-capable RISC-V based processor SoC. The company demonstrated the first real-world use of the HiFive Unleashed board featuring the Freedom U540 SoC, based on its U54-MC Core IP, at the FOSDEM open source developer conference on Saturday.
  
  
• NetSpeed Collaborates with Cadence to Optimize IP for Advanced Automotive SoC Designs (Wednesday Feb. 07, 2018)
  NetSpeed Systems Inc. announced today a collaboration with Cadence Design Systems, Inc. that is intended to provide highly optimized and validated interconnect IP solutions for customers developing advanced system-on-chips (SoCs) for AI and autonomous driving applications.
  
  
• SoC-e releases IEC 61850/62351 SASCrypt IP Core (Wednesday Feb. 07, 2018)
  SoC-e has released the IEC 61850/62351 Substation Automation Systems Cryptographic (SASCrypt) IP Core. This IP Core secures the strict real-time traffic used in the Substation Automation Systems and in new Smart Grid premises. It protects GOOSE and Sample-Measured-Values (SMV) frames used to communicate critical equipment within these premises like Merging Units or IEDs.
  
  
• NetSpeed and Synopsys Collaborate to Enable Early Architectural Exploration of Advanced ADAS and Datacenter SoCs (Wednesday Feb. 07, 2018)
  NetSpeed and Synopsys collaboration helps companies developing ADAS and datacenter SoCs validate system performance and functional safety early in the design process.
  
  
• M31 and Innovative Logic USB 3.1 Gen 2 IP got Certification from USB-IF (Thursday Feb. 01, 2018)
  M31 Technology together with Innovative Logic announced certification of its USB 3.1 gen 2 Device Controller IP in USB Implementer Forum (USB-IF) workshop in Taipei, Taiwan.
  
  
• Movellus Announces "True Digital" PLL, DLL, & LDO Generators (Wednesday Jan. 31, 2018)
  Movellus, Inc. today announced its flagship products, the Movellus PLL Generator, DLL Generator, and LDO Generator, which expand existing automated digital design and verification tools to deliver the optimized and process-portable IPs in hours, replacing months-long analog design methods.
  
  
• New Silicon Device Solutions from Omnitek (Wednesday Jan. 31, 2018)
  At ISE, Omnitek will be announcing new Omnitek Standard Product (OSP) silicon chipset solutions for 4K AV over IP and 4K / HD Warp as competitive alternatives to ASIC and ASSP devices.
  
  
• Arteris IP and Synopsys Accelerate the Optimization of Heterogeneous Multicore Neural Network Systems-on-Chip (Tuesday Jan. 30, 2018)
  Arteris IP today announced the integration of its Ncore Cache Coherent IP with the Synopsys® Platform Architect™ virtual prototyping solution to provide designers of neural network and autonomous driving SoCs with the ability to analyze system-level performance and power consumption earlier in the design cycle for their next-generation multicore architectures.
  
  
• Xylon announces Motion JPEG Encoder (Monday Jan. 29, 2018)
  Xylon announces the logiJPGE Motion JPEG Encoder IP core compliant to the ISO/IEC 10928-1 baseline DCT JPEG standard and optimized for Xilinx® Zynq®-7000 All Programmable SoC and FPGA devices. This IP core can be paired with Xylon's logiJPGD Multi-Channel MJPEG Decoder IP core, or used with third-party decoder counterparts in a wide variety of applications.
  
  
• SoC-e IP Cores support new Xilinx UltraScale+ devices (Monday Jan. 29, 2018)
  All the IP Cores in the SoC-e product portfolio have a version which is supported in devices with UltraScale and UltraScale+ architecture. This devices enhance the performance of SoC-e’s products. The combination of SoC-e’s IP Cores with the performance of these architectures allows the designer to implement leading-edge networking, synchronization and cryptographic technologies for critical systems:
  
  
• UltraSoC delivers industry's first RISC-V processor trace IP (Thursday Jan. 25, 2018)
  UltraSoC, the leading developer of embedded analytics technology, today announced general availability of its RISC-V processor trace solution, an industry first and a key enabler within the RISC-V ecosystem. The addition of trace capabilities means that UltraSoC provides the most comprehensive RISC-V commercial debug solution.
  
  
• Arasan Chip Systems Announces Immediate Availability of MIPI I3C HDK (Thursday Jan. 25, 2018)
  Arasan Chip Systems announces the immediate availability of its MIPI I3C HDK Total IP in a box. The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box.
  
  
• SoC-e Announces New Release of Managed Ethernet Switch (MES) IP Core Supporting DLR for Ethernet/IP (Wednesday Jan. 24, 2018)
  The new realease of SoC-e’s MES IP Core (Managed Ethernet Switch) fully supports DLR protocol. The IP Core allows to implement a DLR end-device, with embedded switching capabilities and supports multiple Ethernet interfaces.
  
  
• Andes Processors Are Not Susceptible to Meltdown and Spectre Attacks (Wednesday Jan. 24, 2018)
  Recent reports on two security vulnerabilities for processors spanning multiple instruction set architectures have brought the security of processor hardware to high attention worldwide. Andes announced today, after its thorough review, none of its processors are affected by either Meltdown or Spectre flaws.
  
  
• Imagination announces hardware virtualized GPU core to meet automotive needs for cluster, HUD and infotainment (Wednesday Jan. 24, 2018)
  Imagination Technologies announces a new, high performance GPU core that supports the multiple, ultra-high resolution displays for cluster, Head-Up Display (HUD) and infotainment that automotive manufactures are fitting to car interiors from 2018 onwards.
  
  
• Micron, Rambus, Northwest Logic and Avery Design to Deliver a Comprehensive GDDR6 Solution for Next-Generation Applications (Tuesday Jan. 23, 2018)
  Micron Technology, Inc., a leading memory and storage provider, today announced with Rambus Inc., Northwest Logic and Avery Design, their efforts to deliver a comprehensive solution for GDDR6, the world's fastest discrete memory. This first-of-its-kind solution would enable GDDR6 use in advanced applications such as high-performance networking, autonomous vehicles, artificial intelligence and 5G infrastructure.
  
  
• Amphion Semiconductor releases enhanced 'Malone' video decoder IP for SoC implementation (Thursday Jan. 18, 2018)
  Amphion today announced the release of the latest version of its highly successful, ‘Malone’ video decoder IP core optimized for SoC implementation. Architectural optimizations have enabled Amphion’s video SoC experts to realize further reductions in the size of the core area while maintaining the performance necessary to support the latest resolution and frame rate demands.
  
  
• Achronix Completes Production Silicon Validation of 16nm FinFET+ Speedcore eFPGA Technology (Wednesday Jan. 17, 2018)
  Achronix announced today that it completed full silicon verification of its Speedcore™ eFPGA production validation chip built on TSMC 16nm FinFET+ process technology.