TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks
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IP / SOC Products News
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Kilopass XPM IP Provides Non Volatile Memory in IBM 65nm LPE Process For Portable Devices That Demand Lower Leakage Than Bulk CMOS Provides (Tuesday Nov. 20, 2012)
Kilopass today announced the validation of its anti-fuse XPM (eXtra Permanent Memory) NVM IP as “Ready for IBM Technology” in the IBM 65nm 10LPe (low-power enhanced) process.
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PLDA Announces Integration of its PCIe 2.0 controller with advanced AMBA AXI interface in Microsemi's new SmartFusion2 SoC FPGA (Monday Nov. 19, 2012)
PLDA today announced incorporation of its PCIe‐AXI bridge IP into Microsemi Corporation’s recently announced SmartFusion®2 SoC FPGA.
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RFEL leverages award winning expertise in DSP to launch family of Video Processing cores (Thursday Nov. 15, 2012)
RFEL will be launching its new family of Video Processing IP cores at the Defence Procurement Research and Technology Exhibition on 21 November 2012 at the University of the West of England.
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Imagination extends PowerVR Series6 family with G6630 6-cluster GPU (Wednesday Nov. 14, 2012)
Imagination Technologies announces the latest six-cluster PowerVR GPU IP core in its ground-breaking PowerVR Series6 family.
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Imagination announces the Meta LTP210 microcontroller IP core (Wednesday Nov. 14, 2012)
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Altera and Northwest Logic Develop RLDRAM 3 Memory Interface Solution (Tuesday Nov. 13, 2012)
Altera and Northwest Logic today announced the immediate availability of a hardware-proven 1,600 Mbps Reduced Latency DRAM (RLDRAM®) 3 memory interface solution for use in its high-end 28 nm Stratix® V FPGAs.
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RivieraWaves and CSEM team up to provide the world's lowest power Bluetooth Smart integrated solution (Monday Nov. 12, 2012)
An integrated Bluetooth Smart solution comprising an ultra-low power RF transceiver with flexible and fully Bluetooth Smart qualified low power baseband, stack and profiles is now available for licensing.
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Imagination announces its new high bandwidth Ensigma Series4 Radio Processing Units (RPU) supporting 802.11ac, 4x4 MIMO and beyond (Monday Nov. 12, 2012)
The Ensigma Series4 IP architecture features a highly scalable multicore approach for maximum configurability, combined with an ultra-high bandwidth programmable bus fabric and an extremely efficient VLIW-based 4th generation modulation processor with multi-context capabilities.
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Audio Codec IP - 40 nm: Dolphin Integration passed TSMC IP9000 Level 4 qualification at Low Power process (Friday Nov. 09, 2012)
Dolphin Integration has rolled out at 40 nm their offering of mixed signal Audio Codec based on the high-End Xenon architecture. It confirms their position as the leading IP partner with the completion of level 4 on IP 9000 TSMC qualification program.
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Stellamar, partners announce All Digital ADC first pass rad hard silicon success (Thursday Nov. 08, 2012)
Stellamar, a leading provider of analog replacement IP solutions, announces first pass silicon validation of its All Digital ADC technology in Honeywell HX-5 Structured Array process for SEAKR Engineering.
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StreamDSP Announces Another Update to its Popular sFPDP IP Core, Adding Support for 28nm Devices from Xilinx and Altera including Kintex-7, Virtex-7, and Stratix-V FPGAs (Monday Nov. 05, 2012)
The release of version 4.3 of the StreamDSP VITA 17.1 Serial Front Panel Data Port (sFPDP) IP core has been announced by StreamDSP, enabling support for the latest 28nm FPGA devices from Altera and Xilinx.
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VLSI Plus offers Multiple Pixel per Clock in all its MIPI CSI2 Receiver IP cores (Monday Nov. 05, 2012)
VLSI Plus today announced the availability of Alias-DT option, which enables outputting multiple pixels per clock, in all its MIPI® CSI2 Receiver IP cores (the SVR family).
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Altera Introduces Serial RapidIO IP Cores to Ensure Interoperability in Next-Generation Communications Infrastructure (Thursday Nov. 01, 2012)
Altera and IDT Team Up to Deliver Serial RapidIO® Gen2 MegaCore® Function IP That Interoperates up to Four Lanes at 6.25 Gbaud
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ARM Launches Cortex-A50 Series, the World's Most Energy-Efficient 64-bit Processors (Wednesday Oct. 31, 2012)
ARM announced the new ARM® Cortex™-A50 processor series based upon the ARMv8 architecture, extending ARM’s leadership in performance and low power.
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Digital Core Design introduces the world's most powerful tiny 8-bit CPU (Wednesday Oct. 31, 2012)
Digital Core Design has introduced the DT8051. The newest IP Core from Poland is the world’s most powerful tiny 8051 available on the market. The complete system with peripherals and the DoCD debugger needs just 6 650 ASIC gates, when a standalone CPU utilizes little else than 3k gates.
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Cortus Releases the World's Smallest 32-bit Microcontroller IP Core (Wednesday Oct. 31, 2012)
Cortus completes the delivery of its 2012 processor roadmap with the release of the APS1. The APS1 is aimed at simpler embedded systems on chip requiring smaller code & data memories and a tiny silicon footprint.
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eSilicon Offers Specialty Memory Products on TSMC 28nm and 40nm Processes (Tuesday Oct. 30, 2012)
eSilicon is now offering memory compilers targeting the networking and computing markets in TSMC's 28nm and 40nm technologies. eSilicon’s specialty eFlex™ and eFlexCAM™ embedded memory products include ternary content addressable memories (TCAMs) and multi-port register files.
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Analog Bits' Sensors Help Achieve Ultra-low Power For ARM-based Servers (Tuesday Oct. 30, 2012)
Analog Bits today disclosed the use of their new Process, Voltage, Temperature sensors with initial customers. These integrated sensors help to monitor and optimize operating Process, Voltage, Temperature for ultra-low power server products such as the latest ARM-based ECX-1000 “Server-on-Chip” from Calxeda, helping to further reduce system-level power consumption.
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Samplify's New APAX IP Core Shatters the Memory Wall for CPUs, GPUs, Application Processors, and SoCs (Monday Oct. 29, 2012)
Samplify announced the availability of its APAX hardware IP core that boosts the performance of multi-core CPUs, GPUs, application processors, and systems-on-chip. The APAX IP accelerates throughput of memory, I/O, and storage by 2X to 8X for high-performance computing (HPC) and cloud computing, as well as consumer electronics and mobile devices performing applications such as image acquisition, video processing, and 3D graphics.
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TSMC's Extremely Low Leakage Devices on 180nm eLL process empowers Dolphin Integration's IP offering (Friday Oct. 26, 2012)
Dolphin Integration today announced the development of a complete platform on the TSMC 180nm eLL process. Dolphin Integration’s silicon-proven IP to provides value to low power MCU devices targeting the TSMC 180nm eLL technological process.
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AnaCatum Launches New Family of Analog Converters (Friday Oct. 26, 2012)
AnaCatum Design announced the launch of its new website showcasing an expanded portfolio of groundbreaking Analog to Digital Converters (ADC) IP cores.
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Altior Inc. announces availability of AltraSTAR - Hadoop Storage Accelerator and Optimizer, based on its Altraflex HW acceleration platform and CeDeFS Filter Layer software (Thursday Oct. 25, 2012)
Altior Inc. announces availability of AltraSTAR - Hadoop Storage Accelerator and Optimizer, based on its Altraflex HW acceleration platform and CeDeFS Filter Layer software. AltraSTAR can significantly reduce Map/Reduce job execution time, increase Data Node storage capacity up to 6x, while simultaneously delivering increased I/O performance.
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Mobiveil to Upgrade Its Serial RapidIO IP Core to RapidIO 10xN Specification (Wednesday Oct. 24, 2012)
Mobiveil, Inc., a leading Silicon Intellectual Properties provider, today unveiled its plans to add support for the third-generation RapidIO 10xN specification to its 2.2- compliant Serial RapidIO (SRIO) Digital IP controllers.
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Sonics Unveils Next-Generation SonicsGN (Tuesday Oct. 23, 2012)
Sonics today unveiled the next generation of its SonicsGN™ (SGN) NoC – the latest product in the company’s broad portfolio of System IP that includes on-chip networks, memory and security subsystems, as well as SoC performance analysis tools.
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PLDA Introduces QuickUDP - 10G UDP Hardware Stack IP for FPGA (Tuesday Oct. 23, 2012)
PLDA today unveiled its 10Gb UDP Hardware stack IP core. PLDA’s QuickUDP IP solution is a 100% RTL-designed IP, compliant with the IEEE802.3 specification and supporting the ARP, IPv4, ICMP, IGMP, and UDP protocols.
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VLSI Plus announces an FPGA version of its 64-bit Second Generation MIPI CSI2 Receiver (Monday Oct. 22, 2012)
VLSI Plus today announced the availability of the SVRPlus-CSI2-F a 64 bit serial video receiver, supporting MIPI® CSI2 and extensions to CSI2 with up to 8 data lanes and two clock lanes, and outputting 1, 2 or 4 pixels per clock.
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IntelliProp, Inc. announces availability of SATA RAID IP Core (Monday Oct. 22, 2012)
IntelliProp announced today the availability of a licensable SATA RAID-IP core. The IntelliProp SATA RAID-IP core follows the RAID 0 (striping) algorithm and allows for the adjustment of parameters such as "data bus width" and "stripe size."
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Moortec Semiconductor Announces its Embedded PVT Die-Sensing IP Range for Deep Submicron Technologies (Wednesday Oct. 17, 2012)
Moortec Semiconductor announces the Moortec Embedded Die Sensor (MEDS) range of IP targeting Process, Voltage and Temperature (PVT) sensing applications for 40-nanometer (nm) and 28-nm CMOS technologies.
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IntelliProp, Inc. Announces Availability of AHCI SATA Host Core AHCI 1.3 Compliant SATA Host Core in Production (Tuesday Oct. 16, 2012)
The IntelliProp AHCI compliant core supports from 1 to 32 ports with SATA 6G performance and is available for integration into ASIC and FPGA designs.
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Analog Bits Extends Industry Leadership to 20nm (Tuesday Oct. 16, 2012)
Analog Bits today announced the successful completion of a tape-out in TSMC’s 20nm manufacturing process and the corresponding availability of a Mixed Signal Design Kit (MSDK) for this advanced node.








